Mismatch of port in fpnew_rounding

[winterNan]

Hi, While trying to synthesis redmule_fma an issue occurs: [Synth 8-11365] for the instance 'i_fpnew_rounding' of module 'fpnew_rounding' declared at '~/pulp/cvfpu/src/fpnew_rounding.sv:16', named port connection 'rst_ni' does not exist ["/home/yuan/pulp/redmule/rtl/redmule_fma.sv":594] While peeping at fpnew_rounding.sv it indeed that has no clock port:

module fpnew_rounding #( parameter int unsigned AbsWidth=2) ( // Input value input logic [AbsWidth-1:0] abs_value_i, // absolute value without sign input logic sign_i, // Rounding information input logic [1:0] round_sticky_bits_i, // round and sticky bits {RS} input fpnew_pkg::roundmode_e rnd_mode_i, input logic effective_subtraction_i,
// Output value output logic [AbsWidth-1:0] abs_rounded_o, // absolute value without sign output logic sign_o, // Output classification output logic exact_zero_o // output is an exact zero );

Can you kindly suggest what went wrong? Am I using the wrong module? Thanks!

[yvantor]

Hi! Yes, I think the issue is related to wrong IP usage. If I do not go wrong, RedMulE requires the pulp-v0.1.3 of CVFPU, where the fpnew_rounding IP should have the clk_i and rst_ni inputs!

[winterNan]

OK Thanks! I managed to get the synthesis results. Closed this now.