"dmireset" seems sticky and needs to be cleared afterwards

pulp-platform / riscv-dbg

RISC-V Debug Support for our PULP RISC-V Cores

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"dmireset" seems sticky and needs to be cleared afterwards #77

Closed silabs-WajidM closed 3 years ago

silabs-WajidM commented 4 years ago

dtmcs.dmireset is W1 in the spec.

In the design It seems that when it is set to 1, then it stays 1 until cleared by writing to dtmcs again. As per spec, dmireset should be a pulse that is used to clear the sticky error state.