search

pulp-platform / riscv-dbg

RISC-V Debug Support for our PULP RISC-V Cores
Other
198 stars 70 forks source link

Fix for issue #58 #85

Open Silabs-ArjanB opened 3 years ago

Silabs-ArjanB commented 3 years ago

Fix for #58

Signed-off-by: Arjan Bink Arjan.Bink@silabs.com

Silabs-ArjanB commented 3 years ago

Hi, could the CI please be started again? (The failure seems unrelated to the committed code)

bluewww commented 3 years ago

Needs a rebase

Silabs-ArjanB commented 3 years ago

@bluewww Merged in master

bluewww commented 3 years ago

I thought about this again, I think its best if we just now allow 8-bit and 16-bit accesses since the code is already in place and seems correct to me see #57

Silabs-ArjanB commented 3 years ago

I thought about this again, I think its best if we just now allow 8-bit and 16-bit accesses since the code is already in place and seems correct to me see #57

Hi @bluewww Fully agreed that that would be the ideal fix. I went down that path first and quickly realized that this is more work than I wanted to invest in this, so instead of adding (not officially required support for) byte and halfword accesses I chose to at least fix the bugs in the currently supported access types. Note that the debugger knows which access types are supported via sbcs (and not supporting all of them is allowed). The code for the byte enables is largely there, but also the wdata, rdata, and address lsb will need fixes to support byte and halfword accesses.

noytzach commented 3 years ago

Hi @bluewww and @Silabs-ArjanB, Please see #106, for adding 8b and 16b accesses