The simulation time would be taken from the first line printing the time, this included error messages. We fix this by taking the last line printing the time.
We use the PrettyTable title feature to replace our custom title output for the test summary table.
Dry simulation runs do not produce any log file. We should not attempt to read the return code from the log file when the run is dry.
Add column field to annotated simulation traces. This is possible only with LLVM toolchains, so we must handle GCC and LLVM toolchains differently.
Previously, lines without timestamps, e.g. FPU instructions executed in the same cycle as an integer instruction, were being parsed incorrectly, so they would not be annotated. Now we use a regex to handle these lines properly.
In some corner cases, addr2line does not display all information for a certain function. We shift to regular expressions to parse addr2line output and correct this condition.
Extend trace visualization utilities to include CVA6 trace in heterogeneous systems including Snitch cluster.
Extend tracevis.py to process traces in parallel.
Extend gen_trace.py to print the line number on an exception.
PrettyTable
title feature to replace our custom title output for the test summary table.addr2line
does not display all information for a certain function. We shift to regular expressions to parseaddr2line
output and correct this condition.tracevis.py
to process traces in parallel.gen_trace.py
to print the line number on an exception.