tc_sram_xilinx writes only the first byte

pulp-platform / tech_cells_generic

Technology dependent cells instantiated in the design for generic process (simulation, FPGA)

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Closed CyrilKoe closed 1 year ago

CyrilKoe commented 1 year ago

The signal be_al and we_al being only one bit wide only the first byte of a word is written on FPGA. See fix proposed in PR https://github.com/pulp-platform/tech_cells_generic/pull/30

niwis commented 1 year ago

fixed in #30