onewire.py: Optimize timing, enable CRC check and slim the code

[robert-hh]

The reason for a change was the observation, that with about 1 in 300 measurements were wrong, some of them obviously. So I made a few changes:

1. The timing of readbit was changed to shorten the initial low puls to 2 µs by not calling sleep_us() at all and reading the state of the bit about 8 µs later. That matches better the datasheet.
2. The CRC check was enabled in the method read_temp_async(). The function returns None, when the CRC is wrong
3. The crc8() method is now table based, with two 16 byte tables, which is about 5 times faster (1.9 ms -> 0.37 ms for 9 bytes)
4. Some inefficient optimizations in the onwire class were removed. Especially caching system call names in local variables for calls used only once in a functions was dropped and replaced by storing the callee names in the class. That saves a few microseconds - maybe not worth the effort.

With change 1, readings with wrong crc are more rare now, about 1 in 15000, and enabling the crc check allows to detect them.

The crc8 implementation is a Python port of the code published here: http://lentz.com.au/blog/tag/crc-table-generator

[amotl]

For everyone reading this, @robert-hh just added the improvements to the pure-Python variant to a separate repository [1].

Apart from that, we have been able to unlock the native 1-Wire/DS18X20 variant coming from Genuine MicroPython through [2] and are also able to confirm this works on real hardware [3] using the respective native drivers [4].

[1] https://github.com/robert-hh/Onewire_DS18X20 [2] https://github.com/pycom/pycom-micropython-sigfox/pull/356 [3] https://community.hiveeyes.org/t/testing-the-custom-dragonfly-builds-on-pycom-devices/2746/6 [4] https://github.com/micropython/micropython/tree/master/drivers/onewire

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