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pymtl / pymtl3

Pymtl 3 (Mamba), an open-source Python-based hardware generation, simulation, and verification framework
BSD 3-Clause "New" or "Revised" License
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Verilog TBgen #167

Closed jsn1993 closed 4 years ago

jsn1993 commented 4 years ago

This PR implements VerilogTBGenPass, a pass that generates a SystemVerilog test harness for co-simulation with SV simulators like VCS. This tool (need a name) combines our "test vector based simulation" and Synopsys VCAT.

codecov[bot] commented 4 years ago

Codecov Report

Merging #167 into master will increase coverage by 0.03%. The diff coverage is 95.17%.

Impacted file tree graph

@@            Coverage Diff             @@
##           master     #167      +/-   ##
==========================================
+ Coverage   89.05%   89.09%   +0.03%     
==========================================
  Files         289      291       +2     
  Lines       25209    25353     +144     
==========================================
+ Hits        22451    22589     +138     
- Misses       2758     2764       +6
Impacted Files Coverage Δ
.../passes/backends/verilog/tbgen/VerilogTBGenPass.py 93.15% <93.15%> (ø)
...s/backends/verilog/tbgen/test/VerilogTBGen_test.py 96.87% <96.87%> (ø)
pymtl3/__init__.py 100.00% <100.00%> (ø)
pymtl3/passes/backends/verilog/__init__.py 100.00% <100.00%> (ø)
...es/backends/verilog/import_/VerilatorImportPass.py 93.27% <100.00%> (+0.03%) :arrow_up:
pymtl3/passes/sim/SimpleTickPass.py 95.23% <100.00%> (+0.36%) :arrow_up:
pymtl3/dsl/Connectable.py 83.00% <0.00%> (+0.27%) :arrow_up:

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