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pyocd / pyOCD

Open source Python library for programming and debugging Arm Cortex-M microcontrollers
https://pyocd.io
Apache License 2.0
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reset halt doesn't work on MPS3 AN524 #1078

Open galak opened 3 years ago

galak commented 3 years ago

When trying to do a 'reset halt' command it reports success but doesn't not seem to either reset or have the SoC/Core halted at reset vector.

flit commented 3 years ago

Are you using the builtin mps3_an522 target, or a CMSIS-Pack? (AN542 isn't supported built-in.)

Try setting the reset type to hardware: -Oreset_type=hw.

Very frustratingly, the M-profile SSE subsystems by default do not have the SYSRESETREQ signal connected to the reset controller IP, so software resets will not work. This has to be enabled by setting a bit in the RESET_MASK register. This is done in the Musca targets, but not in for the MPS3 ANs (I was just trying to get the memory maps added quickly).

Here's the function for Musca-S1: https://github.com/pyocd/pyOCD/blob/7dccf5c5da825d36cb947a7b06c17f6a56852189/pyocd/target/builtin/target_musca_s1.py#L163-L167

If you want to use software reset, probably the best way to do this is with a user script. Maybe override will_reset() to ensure RESET_MASK is programmed. I don't know if the address of RESET_MASK changes from 0x50021104 for every instantiation of SSE-200. The way the AN TRM's are written, you'll have to check the ANxxx TRM for the SSE-x00 subsystem base address, then look in the SSE-x00 TRM for the RESET_MASK address offset.