The current PWM DAC output swings between voltages wildly due to inaccuracies with the ADC inputs, and because of #20 where the internal vRef is not being utilized.
On current Rev.2.0.1/2.1.0 hardware, this issue may be mitigated by reducing the increments that the ADC logic will attempt to adjust the PWM DAC output, as well as adding hysteresis.
Hysteresis can be added easily by subtracting an integer value from the Diff variables.
Lowering the increments that the DAC output will change can be accomplished by dividing the ADJ_COMP and ADJ_FOLLOW variables by a larger value
Additions created which helped the behavior on breadboard/bench testing, but not with the Atmega88pa and Rev.2.0.1 production board. Closing as an added enhancement, will open a new ticket for the actual bug
The current PWM DAC output swings between voltages wildly due to inaccuracies with the ADC inputs, and because of #20 where the internal vRef is not being utilized.
On current Rev.2.0.1/2.1.0 hardware, this issue may be mitigated by reducing the increments that the ADC logic will attempt to adjust the PWM DAC output, as well as adding hysteresis.
Hysteresis can be added easily by subtracting an integer value from the Diff variables.
Lowering the increments that the DAC output will change can be accomplished by dividing the ADJ_COMP and ADJ_FOLLOW variables by a larger value