Add: RISC-V support

[kassane]

Especially RISC-V64.

There is some expectation of adding support for the new RISCV architecture, even though it is an emulated environment for example QEMU.

[VictorElHajj]

:+1: This has been an issue for myself as well

[petterreinholdtsen]

According to https://bugs.debian.org/1016623, /proc/cpuinfo can look like this:

processor   : 0
hart        : 2
isa     : rv64imafdc
mmu     : sv39
uarch       : sifive,bullet0

processor   : 1
hart        : 1
isa     : rv64imafdc
mmu     : sv39
uarch       : sifive,bullet0

processor   : 2
hart        : 3
isa     : rv64imafdc
mmu     : sv39
uarch       : sifive,bullet0

processor   : 3
hart        : 4
isa     : rv64imafdc
mmu     : sv39
uarch       : sifive,bullet0

[leuc]

cat /proc/device-tree/model
StarFive VisionFive V2

cat /proc/device-tree/compatible
starfive,visionfive-v2starfive,jh7110

cat /proc/device-tree/serial-number
VF7110A1-2250-D008E000-00000824

cat /proc/cpuinfo
processor   : 0
hart        : 1
isa     : rv64imafdc
mmu     : sv39
uarch       : sifive,u74-mc

processor   : 1
hart        : 2
isa     : rv64imafdc
mmu     : sv39
uarch       : sifive,u74-mc

processor   : 2
hart        : 3
isa     : rv64imafdc
mmu     : sv39
uarch       : sifive,u74-mc

processor   : 3
hart        : 4
isa     : rv64imafdc
mmu     : sv39
uarch       : sifive,u74-mc

[enh-google]

https://github.com/pytorch/cpuinfo/pull/190