Closed tpourcelot closed 3 years ago
Thanks for starting with the documentation of the v8 revision of the board. When examining it, I found the following: 1) The button is not located at M13 (as with v7), at least I can not get it to work. 2) J1 pin 8 (hub75 E) is assigned to E3, but on all other connectors to N4. 3) J8 pin 7 is assigned to N5, but that port is already assigned to hub75 A. If I had to make a guess, I think B15 would be a likely candidate. 4) The LED is high active, not low active as on the v7 board.
I've been looking at the v8 revision myself, since that is what I got when I ordered the board. And there are indeed some errors in your documentation.
Hopefully these comments are helpful for improving the documentation
I think setting M13 to input has caused the LED to become active high, because after changing the button port to R7 the LED is indeed active low again. Pretty weird. Thanks @msvisser.
Hi @erwin3169 and @msvisser , thank you for your feedback on this revision.
It indeed contained some errors =(
- The button is not located at M13 (as with v7), at least I can not get it to work.
The button seems to be located at R7 as indicated by @msvisser
- J1 pin 8 (hub75 E) is assigned to E3, but on all other connectors to N4.
Corrected, J1 pin 8 is assigned to N4 similarly to all others connectors.
- J8 pin 7 is assigned to N5, but that port is already assigned to hub75 A. If I had to make a guess, I think B15 would be a likely candidate.
B15 was indeed a good guess (checked with pin-scan)
- The pinout on J1 is not completely correct, pin 6 should be F5, pin 7 should be E3 and pin 8 should be N4. This is the result with my board at least. With pin 8 as N4 it also correctly matches all the other connectors for pin 8-15.
It is now corrected
- The pinout on J8 is not completely correct, pin 7 should be B15, as @erwin3169 mentioned in their comment.
Also corrected
- The button is located at pin R7. I found this by trial and error looking at where the connection should approximately be.
Confirmed with pin-scan
Hopefully these comments are helpful for improving the documentation
They were very useful, thank you both!
I have found some more connections, this time for the ethernet PYHs.
These three connections are shared for both of the PHYs, so lowering the PHYRSTB line will reset both PHYs. The management interface over MDC/MDIO can access the registers for both PHYs by addressing them with address 1 and 2.
Hi! Could you check/confirm that the JTAG pinout is correct? JTAG pins are backwards-numbered on this version of the board.
Apparently, the pinout is correct, so probably a warning needs to be added under the picture on the 5A-75B page.
Hi, I recently ordered a 5A-75B and got a new revision: V8.0.
This model seems to have only one 2MB SDRAM chip, but is otherwise very similar to the others 5A-75B boards.
I also runned pin-scan to map some of the output pins, but the mapping of SPI, SDRAM or PHY's pinouts is still in progress and are untested.
Thanks for all the previous work which allowed me to test this very quickly :)