User defined gate insertion for the ZNE method

[BrunoLiegiBastonLiegi]

It might be useful to modify the ZNE implementation to accept a user defined gate for the pair insertions used to realize the different noise levels. The current implementation makes use of CNOT gates, since the 2-qubit gates are usually the noisiest, but in principle it should work with any other gate, even the single qubit ones.

Something like this:

def ZNE( circuit, observable, noise_levels, insertion_gate=None, backend=None, noise_model=None, nshots=10000, solve_for_gammas=False, ):

Then, we would be able to run ZNE and vnCDR for 1 qubit circuits as well, and in particular for our fit experiment.

[AlejandroSopena]

Yes, this is a good idea. We can say that the native gates are $R_Z(\theta)$ and $R_X(\pi/2)$. Any other single-qubit gate can be decomposed into these two. In fact, the only physical gate in the sense that it is implemented as a pulse is $R_X(\pi/2)$. $R_Z$ gates are implemented virtually, i.e. at software level. This means that for example the combination $R_Z(\theta)R_X(\pi/2)$ is implemented as a single pulse of type $R_X$ with a certain phase shift that affects all gates after the $R_Z$. So the $R_Z$ gates are free. Therefore, to increase the noise with single qubit gates I suggest to change $R_X(\pi/2) \rightarrow R_X(\pi/2)R_X(-\pi/2)R_X(\pi/2)$. This also means that it is a good idea to maximise the number of $R_Z$ gates in the circuit.

[BrunoLiegiBastonLiegi]

I see, therefore, instead of allowing the user to use any gate for the insertion, it is probably sufficient to let them choose between CX and RX. @AlejandroSopena do you reckon we should go only for the $R_X(\pi/2)$, or in general allow that for any angle $R_X(\theta)$?

[AlejandroSopena]

Since the native gates are $R_X(\pi/2)$ and $R_Z(\theta)$, in order to implement any other gate we have to decompose them into the native gates. This is done automatically by the transpiler when running the circuit. But since for error mitigation we need to control the error, it is important to decompose the circuit into native gates before mitigation. For the $R_X(\theta)$ we have $R_X(\theta)=R_Z(\pi/2)R_X(\pi/2)R_Z(\theta)R_X(-\pi/2)R_Z(-\pi/2)$. Of course when $\theta=\pi/2$ we can implement the gate directly with one pulse. But, I have noticed that the transpiler does not make that distinction. I mean, the $R_X(\pi/2)$ gate is implemented as $R_Z(\pi/2)R_X(\pi/2)R_Z(\pi/2)R_X(-\pi/2)R_Z(-\pi/2)$ (this is equal to $R_X(\pi/2)$ ) so we are using two pulses to implement $R_X(\pi/2)$ instead of just one. In summary, now all $R_X(\theta)$ gates have the same error so we could allow gate insertion for any angle $\theta$. But I think it is better to distinguish between $\theta=\pi/2$ and $\theta\neq\pi/2$. I will add that into the transpiler and then it will be better for error mitigation to scale the noise just using $R_X(\pi/2)$ gates.

[MatteoRobbiati]

Since we are going to use only CDR, do you think we can close this?

[BrunoLiegiBastonLiegi]

Yes I think so, btw the changes have been included in qibo already