Closed zlatko-minev closed 3 years ago
If everything is selected right now we draw full chip, but this needs to be a flag for user choice
So I think this can be managed just by some tweaking of the current logic flow.
The previous manner where we did full chip if all components rendered, bounding box if only some components are rendered, can be dropped and just replaced with the above. Although the previous allowed some simplicity and streamline, we found enough occourences that were problematic that I think the above suggested approach is probably the best case to go with.
Thank you
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On Jan 20, 2021, at 1:13 PM, Thomas G McConkey notifications@github.com wrote:
So I think this can be managed just by some tweaking of the current logic flow.
User chooses to have the chip or a bounding box rendered If chip, the dimensions for the chip are used, regardless of circuit layout (if the user placed a transmon way outside the chip, well that is on them) If bounding box, the buffering values are used. The previous manner where we did full chip if all components rendered, bounding box if only some components are rendered, can be dropped and just replaced with the above. Although the previous allowed some simplicity and streamline, we found enough occourences that were problematic that I think the above suggested approach is probably the best case to go with.
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Spoke with @dwang429 , need to have conversation with @zlatko-minev and @ThomasGM4
The user should be able to select to either render the full chip, or abounding box that is X or Y mm larger than the minimum Im bounding box enclosing all selected items.
I think Thomas had a nice explanation for this 
What is the feature being requested?
Fix Q3d and Ansys render chip bounding box vs. full ground plane
What are use cases for this feature?