Open HarryMakes opened 3 years ago
It's important to first determine which calibrations are actually required and meaningful in practice. The fact that something can be calibrated (deviate from the datasheet and nominal values) doesn't mean that it should be calibrated. The calibration may actually be less accurate than the on-paper value and on top of that VSWR or things like https://github.com/sinara-hw/Booster/issues/375 may make the calibrated values less meaningful than the default ones in several cases.
This was and is unclear and it is also unclear to what extent data from the old firmware actually provides a benefit for the new one. My gut feeling is that state, bias and interlock threshold are the only useful and meaningful ones.
Other than that, sure, on-the-fly conversion of old data would be really nice where this is meaningful and once tested thoroughly to be working robustly.
Without having checked anything, the 4095.0
in your notes should probably all be 4096.0
.
@jordens Thanks for the comments. I know the answer to your concern about 4095.0
. Actually, it's used for STM32F4's ADC conversion only and matches both the Rust HAL and STM32 official HAL implementations:
stm32-rs/stm32f4xx-hal: ADC digital full-scale value is (1 << bit_resolution) - 1
.
https://github.com/stm32-rs/stm32f4xx-hal/blob/v0.8.3/src/adc.rs#L761
STMicroelectronics/STM32CubeF4: ADC digital full-scale value is 0xFFF >> ( RES >> (24-1) )
, where RES
is the resolution setting value (bits 25:24) of register ADC_CR1
.
https://github.com/STMicroelectronics/STM32CubeF4/blob/4aba24d78fef03d797a82b258f37dbc84728bbb5/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_adc.h#L1603-L1604
Here's a table for better understanding:
Value of RES[1:0], i.e. ADC_CR1[25:24] | ADC_CR1[25:24] >> 23, i.e. RES[1:0] << 1 | Equivalent bit resolution |
---|---|---|
0b00 | 0b000 == 0 | 12 - 0 = 12 |
0b01 | 0b010 == 2 | 12 - 2 = 10 |
0b10 | 0b100 == 4 | 12 - 4 = 8 |
0b11 | 0b110 == 6 | 12 - 6 = 6 |
So apparently, STM32 ADC works differently from ADC ICs (DAC7571, MCP3221). Digging deeper, I found a difference in terms of "last code transition" between STM32 ADC and MCP3221:
STM32 ADC (manual):
3.1.2 Gain error ... The last actual transition is the transition from 0xFFE to 0xFFF. Ideally, there should be a transition from 0xFFE to 0xFFF when the analog input is equal to VREF+ – 0.5 LSB.
MCP3221 (datasheet):
4.8 Gain Error ... The ideal location of the last code transition is 1.5 LSBs below full-scale or VDD.
I can't find similar info for DAC7571, but this StackExchange comment also suggests that the max binary code normally can't differentiate Vref from Vref - 1.5 LSB. So I think STM32 ADC is a special case.
No. Also for the STM32F4 the scale is one LSB per VREF/4096. See e.g. page 10 of the manual you quote. If someone (HALs) divides by 4095, it's simply wrong. Filing an issue would be good.
@jordens Thank you for the advice! I've opened an issue here: https://github.com/stm32-rs/stm32f4xx-hal/issues/362
Hi to all, in M-Labs we have come across the lack of compatibility between Legacy firmware and NGFW in terms of configuration data format stored in the EEPROMs. Given a set of data calibrated using Legacy, I'd like to propose a documentation on interpreting the existing data in Legacy format, and convert them to NGFW, possibly done manually or in code with a future PR.
I'm only aware of a similar discussion about documenting NGFW calibration on #107. Please remind me of other threads related to this topic if there's any.
My draft is presented as follows. Please also feel free to point out any mistakes.
Harry's draft
## Conversion Perform conversion to power (in dBm) as required by NGFW. ("EEPROM `@n` \