Support for Virtex 6 series

quartiq / bscan_spi_bitstreams

FPGA gateware and pre-build bitstreams that expose SPI over JTAG. The protocol is implemented (among others) by openocd.

MIT License

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Open bl0x opened 2 years ago

bl0x commented 2 years ago

Dear all,

what would be needed to add support for Xilinx Virtex 6 series of FPGAs?

I guess the reason that there is no support so far is mainly due to the fact that there was no demand. Or are there other impediments?

I'd be happy to help here, if I would get a few pointers where to look.

jordens commented 2 years ago

Probably just needs porting. BSCAN_VIRTEX6 and STARTUP_VIRTEX6 in https://www.xilinx.com/support/documentation/sw_manuals/xilinx14_7/virtex6_hdl.pdf and follow the Spartan6 code.