Migrate quilc to use new ISA

[erichulburd]

Rigetti API is now exposing a new InstructionSetArchitecture.

A few questions:

• Do we want to change the ISA format that quilc parses? Or should clients instead transform the new Rigetti ISA into the ISA currently expected by quilc (ie Pyquil and one of its dependencies)? Is there any additional information in the new ISA that quilc will want to make use of?
• If we modify the ISA format expected by quilc, should it also accept past formats for backwards compatibility? Perhaps making use of some sort of version number that comes in with the ISA?
• Should we modify any of the existing structs (ie CHIP-SPECIFICATION, PERMUTATION-RECORD, GATE-RECORD, HARDWARE-OBJECT, etc) to reflect changes to the ISA? Realize new fields may be added, but are there any changes to the struct definitions that will have downstream effects (ie code consuming the chip-specification)?
• What are people's thoughts on top-level validation? Basically, rather than implementing type checks and key assertions as guards at the top of parsing functions in chip-reader.lisp, validating the hash-table using a Common Lisp implementation of json-schema in the rpcq handler as well as a the file parser? The fisxoj/json-schema accepts a hash table for validation. Have not verified its type assertions' compatibility with the yason and rpcq.

[stylewarning]

I would add a parser/converter to the quilc package (or another package adjacent to the quilc package), which then constructs cl-quil-native structures.

I would keep the existing functionality inside of cl-quil untouched as much as feasible. And I would not add a(nother) parser to cl-quil.