Closed ra3xdh closed 2 days ago
there is a more flexible solution for library location:
USER and PROJECT directory are writeble for user
all compiled OSDI modules will be placed to the $HOME/.qucs/osdi_modules location and attached automatically while forming .spiceinit config
compilation approach, control duplicated name and recompilation condition (e.g. via file timestamp) are subject to discuss
The development of the OpenVAF compiler seems to be suspended. See https://github.com/pascalkuthe/OpenVAF/issues/111#issuecomment-1931763488 for more details. By this reason I am removing this issue from the development plan for the next release. Let's wait for more news about OpenVAF future, because the support of Verilog-A in Qucs-S+Ngspice is strongly depends on OpenVAF.
The development of OpenVAF compiler still be suspended. No more visible contributions since October 2023. I would close this task, because the future of OpenVAF still be not clear. May be reopened if some maintainer will appear in OpenVAF project.
https://openvaf.semimod.de/blog/vacask/ "some maintainer" appear :)
Maybe it makes sense to switch to openvaf-reloaded fork and use it by default.
Windows builds not provided...
One of the problems with OpenVAF is it requires external resources. #373 , #100
After it was decided OpenVAF was dead I deleted these resources so I'm back to square one...
The microstrip devices models #94 will be most likely implemented in form of Verilog-A modules. These modules should be compiled with OpenVAF and attached to Ngspice. It's need to provide a way to attach Verilog-A model to system devices. I propose the following approach:
share/qucs-s/va_library
directory in the installation root.The two ways to integrate these models are possible:
Add a button named like Compile system libraries in the application setting dialog near the OpenVAF configuration input field. Compiled OSDI modules will be placed to the
$HOME/.qucs/osdi_modules
location and attached automatically while forming.spiceinit
config. Modules should be build once.Scan schematic recursively and compile OSDI modules automatically before the simulation if some device referencing Verilog-A model is found.
The combination of these two approaches is also possible. This feature should be added in order to implement #94 in the next release.