Error running ISPD2016 FPGA12 benchmark

[magic3007]

I attempted to run the ISPD2016 FPGA12 benchmark with the following configuration,

{
"aux_input" : "benchmarks/ispd2016/FPGA12/design.aux",
"gpu" : 1,
"num_threads" : 1,
"num_bins_x" : 512,
"num_bins_y" : 512,
"global_place_stages" : [
    {"num_bins_x" : 512, "num_bins_y" : 512, "iteration" : 2000, "learning_rate" : 0.01, "wirelength" : "weighted_average", "optimizer" : "nesterov"}
],
"target_density" : 1.0,
"density_weight" : 8e-5,
"random_seed" : 1000,
"scale_factor" : 1.0,
"global_place_flag" : 1,
"legalize_flag" : 1,
"detailed_place_flag" : 0,
"dtype" : "float32",
"deterministic_flag" : 0,
"result_dir": "results/ispd2016/FPGA12"
}

and I encountered the following error:

I am seeking assistance finding a working script for running the ISPD2016 benchmark. Could you please provide a script or guidance on how to configure the benchmark to run it successfully and properly? I would appreciate it if you could provide the scripts for running all the ISPD2016 benchmarks from FPGA01 to FPGA12.

Thank you. 😊

[rachelselinar]

Thank you for mentioning this issue.

To fix the issue, please include "routability_opt_flag" : 1 in your configuration. All the other settings are good. I have updated the example json files to reflect this setting and updated README as well.

When the 'routability_opt_flag' is not set, the placer does not inflate the LUT/FF instances to account for routability, pin density, and packing compatibility. This makes packing-legalizing the LUT/FF instances harder. For smaller designs such as FPGA-example1, the packer-legalizer can still find legal solutions when the routability optimization is not done. However for large designs, this affects the packing-legalization significantly causing errors like the one you mentioned or taking very long time to find legal solution.

Closing issue.