Move LUT occupying entire BLE to 6LUT location instead of 5LUT

[rachelselinar]

In US+ designs, having any single LUT in BLE in the 5LUT location instead of 6LUT is causing errors in Vivado during routing. Currently only six-input LUT is placed in 6LUT, and others are not checked. Update legalizer to fix this inherently instead of fix in IFWriter based on PR #13.

Pasting relevant information below from @eddieh-xlnx 's email:

“A6” sitewire of a site containing just a LUT5 (no LUT6) does not have the “A6” sitewire set to VCC. Here is a screenshot of the Vivado device view:

E6 sitewire is not set to VCC, thus it appears as an antenna after “route_design”.

There are two possible solutions:

1. Set the [A-H]6 sitewire to GND for all cases when [A-H]5LUT is occupied but [A-H]6LUT is not.
2. There is no advantage in placing a LUT[54321] into a [A-H]5LUT BEL when the corresponding [A-H]6LUT BEL is unoccupied. You might as well place it in the latter as it’s a little more flexible and a little faster to exit the site too.

[rachelselinar]

@zhilix Can you provide a test case for this issue. As per https://github.com/rachelselinar/DREAMPlaceFPGA/blob/main/dreamplacefpga/ops/lut_ff_legalization/src/lut_ff_legalization.cpp#L4409, this should not happen. The tool puts the LUT with higher lut_type (#inputs) at odd position. LUT0 is not handled here.

[zhilix]

Yes, can you try to find these LUTs that are placed to a single '5LUT' location instead of '6LUT'? Just run python dreamplacefpga/Placer.py test/gnl_2_4_3_1.3_gnl_3000_07_3_80_80.json

single 5LUT detected: LUT2_29 E5LUT SLICE_X77Y149 single 5LUT detected: LUT3_35 G5LUT SLICE_X77Y151 single 5LUT detected: LUT2_55 B5LUT SLICE_X70Y147 single 5LUT detected: LUT3_fb E5LUT SLICE_X70Y147 single 5LUT detected: LUT4_39 E5LUT SLICE_X77Y150 single 5LUT detected: LUT2_28 H5LUT SLICE_X77Y150 single 5LUT detected: LUT2_100 E5LUT SLICE_X71Y149 single 5LUT detected: LUT2_37 G5LUT SLICE_X75Y149 single 5LUT detected: LUT2_e9 E5LUT SLICE_X70Y144 single 5LUT detected: LUT3_6b G5LUT SLICE_X65Y141 single 5LUT detected: LUT2_eb H5LUT SLICE_X69Y144 single 5LUT detected: LUT2_84 D5LUT SLICE_X70Y141 single 5LUT detected: LUT4_7a H5LUT SLICE_X70Y141 single 5LUT detected: LUT2_79 E5LUT SLICE_X70Y139 single 5LUT detected: LUT2_7f B5LUT SLICE_X68Y144 single 5LUT detected: LUT2_85 H5LUT SLICE_X68Y139 single 5LUT detected: LUT3_64 H5LUT SLICE_X74Y140 single 5LUT detected: LUT4_93 H5LUT SLICE_X66Y138 single 5LUT detected: LUT4_187 F5LUT SLICE_X72Y159 single 5LUT detected: LUT2_18b F5LUT SLICE_X77Y161

For example 'LUT2_29' in design.final.pl is placed at '121 149 8' with a even z location, and location '121 149 9' is not assigned with any other LUTs.

[rachelselinar]

Submitted fix for this issue. For small designs, when instances did not have site candidates closeby for ripup, it caused incorrect solution. @zhilix please verify and close Issue. Thanks!

[zhilix]

I verified this and it's working, I'll delete this function from IFWriter.py.

[rachelselinar]

Thanks for verifying @zhilix. Closing issue.