Visualize the simDB, the objects database to be able to see the hierarchy of the design. New signals can be added from this database to the waveform.
This issue has to start with cleaning up the simDB itself. Problems:
Now the Signal object has a references property pointing to all signal objects, which always have the same value. Check out VCD Wiki: "Several variables can share an identifier if the simulator determines that they will always have the same value. " This, currently used data-structure is the most compact. But, now, we cannot add a particular simulation-object to the waveform, only a Signal instance, so we don't know which object has been added from the references (i.e, aliases)
A Verilog module descriptor class/instances will be useful to point to the source file or others.
First, why can't I let this, reference-issue go? This is a rare phenomenon. Usually, I want to simulate/add different signals. Ok, but note, that the synchronous-clocks will be the same in the case of the most frequently used, behavioral simulation. Also note, that the clocks have value-change the most frequently. So it requires memory. So do not store the clock multiple times, if it is possible.
Solution candidates for the references problem:
Define a new Object class, which has a propery: hierarcy or name, which describe which simulation-object are we talking about, and another property will be the Signal with the wave, references properties. This is a clean way, but it will add another (maybe unnesesary) stack level to getValue() during rendering: WaveformRow.getValue() ~> SimulationObject.getValue() ~> Signal.getValue()
Another possibility is to update and duplicate Signal objects. Add (more precisely use currently abandoned hierarcy property) and this will point to one, particular simulation-object. Then duplicate all Signal object if it has any other references (i.e, aliases). Note, that this won't duplicate the wave property, which stores the value-changes.
Feature request - Add objects, aka. simDB view
Visualize the simDB, the objects database to be able to see the hierarchy of the design. New signals can be added from this database to the waveform.
This issue has to start with cleaning up the simDB itself. Problems:
Now the Signal object has a
referencesproperty pointing to all signal objects, which always have the same value. Check out VCD Wiki: "Several variables can share an identifier if the simulator determines that they will always have the same value. " This, currently used data-structure is the most compact. But, now, we cannot add a particular simulation-object to the waveform, only a Signal instance, so we don't know which object has been added from thereferences(i.e, aliases)A Verilog module descriptor class/instances will be useful to point to the source file or others.
First, why can't I let this, reference-issue go? This is a rare phenomenon. Usually, I want to simulate/add different signals. Ok, but note, that the synchronous-clocks will be the same in the case of the most frequently used, behavioral simulation. Also note, that the clocks have value-change the most frequently. So it requires memory. So do not store the clock multiple times, if it is possible.
Solution candidates for the references problem:
Define a new
Objectclass, which has a propery:hierarcyorname, which describe which simulation-object are we talking about, and another property will be the Signal with thewave,referencesproperties. This is a clean way, but it will add another (maybe unnesesary) stack level togetValue()during rendering:WaveformRow.getValue() ~> SimulationObject.getValue() ~> Signal.getValue()Another possibility is to update and duplicate Signal objects. Add (more precisely use currently abandoned
hierarcyproperty) and this will point to one, particular simulation-object. Then duplicate all Signal object if it has any otherreferences(i.e, aliases). Note, that this won't duplicate thewaveproperty, which stores the value-changes.Use-cases: