Open ZhangZhuoSJTU opened 6 years ago
To tell the truth, we are always going to met some problems which depended on architectures, and need some architecture-depended analyzer. Does it work if we use RadecoProject
to specify these analyzers and backends?
@sushant94 @XVilka
@ZhangZhuoSJTU from my PoV yes, using RadecoProject is the preffered way. Not sure if it works right now though.
@XVilka I see. I am checking these in RadecoProject. @sushant94 suggested me to write some llanalyzer, which I think it is a good idea. Working on it.
I need some time to catch you guys up. What an amazing progress you have taken!
Right now, I think we might need to get the predications for conditional branch instructions (Something like
eax < ebx
), which might be very useful in several analysis stages including VSA I will rewrite these days. And no matter when, we will need these information for the decompilation output.However, conditional flag registers are architecture-depended, so the design will also be architecture-depended. My initial ideas goes:
Add new analysis stages named
analysis/conditions/
, which goes likeanalysis/conditions/x86
,analysis/conditions/arm
and something else. (Or other better names)Later, we could use
RadecoProject
to specify which analyzer to use.Any suggestions?