MDA v-sync not working

[userx14]

Good evening, I'm trying to use a gbs8200 to create an adapter from mda/hercules to vga. This mode is not supported by the official adapter because h-frequency is 18.4 kHz and therefore out of range according to the manual. But with this firmware I kind of got it working, but the picture is scrolling vertically through the screen from top to bottom, so vsync is not working. The signal is there electrically, I checked with an oscilloscope so it's probably not caused by that.

I used an esp-01 as an adapter (the black one with 1Mbyte flash). I can access the website and change settings, but can't access the serial monitor over uart because all pins of the board are used for i2c, debug and led. (It only has 4 broken out gpio pins, but I might be able to connect some more but that would require some smd soldering)

Get Video Timings returns:

htotal: 1802 HS ST/SP : 8 108 HB ST/SP(dis): 1696 352 HB ST/SP : 1696 256

vtotal 1000 VS ST/SP : 1 5 VB ST/SP(dis): 990 28 VB ST/SP : 4 10 IF_VB_ST/SP: 18 20

The stange thing is that it doesn't matter if I have the v-sync signal connected or not. All options are zero except: frame time lock, auto gain, scanlines,line_filter, peaking are all =1

Is mda/hercules even possible with this chip and does someone have a recommendation on what to try to get sync working? Even though the original signal has 50Hz I don't need high framerates for this project even 1fps would be sufficient, its a measurement device and does update it's display very slowly. Greetings Benjamin

[ramapcsx2]

Hey, the timings shouldn't be a problem, if you connect your source using separate H/V Sync. I need to see some logs of what gbscontrol detects. You can use the web ui log window to grab some details, but since this is using websockets, it doesn't always capture everything. You may want to retry a few times and see what you get.

• Please disable frame time lock. This is meant for CSync mode, and is there to defeat the single buffer VSync tear line, so it doesn't apply here.

• The get video timings command displays output information for the loaded preset, not input timings (I should rename this, I think).

• Even if you can't capture good logs, the main thing to watch out for is whether it runs "RGBHV bypass" mode, or not. You can tell it's in bypass mode when none of the output resolution presets seem to change anything.

[userx14]

Hey, the timings shouldn't be a problem, if you connect your source using separate H/V Sync. I need to see some logs of what gbscontrol detects. You can use the web ui log window to grab some details, but since this is using websockets, it doesn't always capture everything. You may want to retry a few times and see what you get.

* Please disable frame time lock. This is meant for CSync mode, and is there to defeat the single buffer VSync tear line, so it doesn't apply here.

* The get video timings command displays output information for the loaded preset, not input timings (I should rename this, I think).

* Even if you can't capture good logs, the main thing to watch out for is whether it runs "RGBHV bypass" mode, or not. You can tell it's in bypass mode when none of the output resolution presets seem to change anything.

Yes it says RGBHV bypass, maybe that would explain what happened on the first monitor which is an older model. Just a hour ago this LCD died, but another newer monitor complains about input format out of spec, so the gbs seems to pass the frames through without modifying the timing. I would have guessed that it has SRAM to store some frames, but is it even able to output at different timings?

It's connected with seperate hsync and vsync.

Frame thime lock disabled does not seem to change anything.

[userx14]

If I interpret the manual corectely its impossible to change the timings in bypass mode right?

5.8.3 Timing generation for bypass mode
For bypass mode, we must keep the input video stream’s line rate and frame rate, but we can adjust
the horizontal and vertical sync position and blanking width and position:

So I would need to get it from Mda/Hercules v: 50Hz h: 18.4kHz r: 720 × 348 to something like v: 85Hz h: 53.7KHz r: 800 x 600 or any other modern vga timing which has any chance to be accepted by the monitor.

[userx14]

I have solderd additional pins to the esp and now have a serial interface working. When it's rebooted it outputs:

starting
(WiFi): still connecting..
userprefs open ok
preset preference = 2
frame time lock = 0
preset slot = 1
frame lock method = 0
auto gain = 1
scanlines = 1
component output = 0
deinterlacer mode = 1
line filter = 1
peaking = 1
pal force 60 = 0
i2c: 1A
       <reset>
Activity detected, input: RGBS/HV
VSync: present
HSync: present
RGBHV bypass
ADC gain: keep previous
7B 7B 7B
post preset done (preset id: 1)
(WiFi) AP mode (SSID: gbscontrol, pass 'qqqqqqqq'): Access 'gbscontrol.local' in your browser

[ramapcsx2]

Okay, I haven't documented this properly yet, but there are basically 2 operating modes for gbscontrol:

• RGBHV bypass
• Upscaler mode

Users can't select between the modes yet. Instead, bypass mode is selected whenever separate Sync is provided, and upscaler mode is selected when a form of CSync is provided. So all you need to do is modify your cable, in case your source provides CSync.

I have some preliminary code in place to do upscaling mode with separate Sync, but it needs more work yet. If you want to try it, change "uopt->preferScalingRgbhv" to "1": https://github.com/ramapcsx2/gbs-control/blob/master/gbs-control.ino#L3854

[ramapcsx2]

The high horizontal rate might be a problem for the monitor still. If that happens, I'll show you how to disable the field rate adjustment feature.

[userx14]

Okay, I haven't documented this properly yet, but there are basically 2 operating modes for gbscontrol:

* RGBHV bypass

* Upscaler mode

Users can't select between the modes yet. Instead, bypass mode is selected whenever separate Sync is provided, and upscaler mode is selected when a form of CSync is provided. So all you need to do is modify your cable, in case your source provides CSync.

I have some preliminary code in place to do upscaling mode with separate Sync, but it needs more work yet. If you want to try it, change "uopt->preferScalingRgbhv" to "1": https://github.com/ramapcsx2/gbs-control/blob/master/gbs-control.ino#L3854

I'll test the the "software" solution first, because what I've found as Vsync/Hsync to Csync requieres components I don't have at hand right now http://www.epanorama.net/circuits/vga2rgbs.html , maybe a moderm microconroller should be able to do that too, but it would be a bit wastefull.

I'll try that tommorow and report back.

[userx14]

I'm not 100% sure if I flashed the esp corectely, but after changing the uopt->preferScalingRgbhv to = 1 it still showes RGBHV bypass, but I will test that again tomorrow. Unfortunately I don't have that much time at the moment, but that should get better on the weekend. Can you tell from a dump (d) if the mode was changed as expected? My monitor still shows a black picture, but I will try to find an older model because they seem to be more forgiving when it comes to missmatched timing and still show a wandering picture.

Would it be possible to change those settings on the fly by manipulating the registers directely? You have some commands to read/write to them directely right?

https://github.com/ramapcsx2/gbs-control/blob/master/gbs-control.ino#L4720

The only useful document from trueview seems to be their internal programming guide.

[ramapcsx2]

It's possible I broke the initial implementation. I'll check it when I have some time.

You're right though, the chip has to be programmed via its registers. To get an idea of the process, this function enables the bypass mode. https://github.com/ramapcsx2/gbs-control/blob/master/gbs-control.ino#L3156 This mode requires the least programming, as there's no VDS processor, no deinterlacing pipe and no Input Formatter. You can reference the GBS::xxx functions with the register definitions.

The "s" and "t" commands you found allow setting an entire register, or toggling a single bit. Format for setting: s02s1bsff (set segment 02, register 0x1b, value 0xff) Format for bit toggle: t02t1bt7 (toggle segment 02, register 0x1b, bit 7) Leading zeros get ignored to some reasonable extent. My parser isn't the best ;p

[userx14]

It's possible I broke the initial implementation. I'll check it when I have some time.

You're right though, the chip has to be programmed via its registers. To get an idea of the process, this function enables the bypass mode. https://github.com/ramapcsx2/gbs-control/blob/master/gbs-control.ino#L3156 This mode requires the least programming, as there's no VDS processor, no deinterlacing pipe and no Input Formatter. You can reference the GBS::xxx functions with the register definitions.

The "s" and "t" commands you found allow setting an entire register, or toggling a single bit. Format for setting: s02s1bsff (set segment 02, register 0x1b, value 0xff) Format for bit toggle: t02t1bt7 (toggle segment 02, register 0x1b, bit 7) Leading zeros get ignored to some reasonable extent. My parser isn't the best ;p

I can now confirm that the esp was reprogrammed and still shows bypass mode. Thanks for the explanation on the registers, I'll try to start from the bypass mode and read the programming guide a bit, thanks 👍

[ramapcsx2]

I checked the code and it surely was too limiting for your source format. Try the latest master for a much better chance of the mode actually working. I'm not sure what details your PAL mode will expose though, still working on it ;p

[userx14]

I checked the code and it surely was too limiting for your source format. Try the latest master for a much better chance of the mode actually working. I'm not sure what details your PAL mode will expose though, still working on it ;p

Testing results:

starting
(WiFi): still connecting..
userprefs open ok
preset preference = 0
frame time lock = 0
preset slot = 1
frame lock method = 0
auto gain = 0
scanlines = 0
component output = 0
deinterlacer mode = 0
line filter = 1
peaking = 1
pal force 60 = 0
i2c: 1A
<reset>
Activity detected, input: RGBS/HV
VSync: present
HSync: present
RGBHV bypass 
post preset done (preset id: 1)
60Hz EDTV 
post preset done (preset id: 1)
large diff
ABHT: retry
large diff
ABHT: retry
large diff
ABHT: retry
large diff
ABHT: retry
large diff
ABHT: retry
large diff
ABHT: retry
large diff
ABHT: retry
large diff
ABHT: give up

I can now see a picture on the monitor and it no longer complains about input out of range, but the picture freezes and it's not aligned: LCD (static): original (note: the original picture has some black borders around the picture which are not very visible because of the contrast of the picture):

[ramapcsx2]

Awesome, try sending "t5t11t5" (and update your Datenkopf xD). (Maybe the Datenkopf isn't plugged onto the data neck? I love this xD)

[ramapcsx2]

New update adds some distinction between 60Hz and 50Hz. Your mode should load the PAL preset now, which should fit the requirement a little better, I hope. I also changed the H-PLL charge pump current, in case the presets have set it too high for these broad applications.

[userx14]

With t5t11t5 and plugged in Datenkopf...

[userx14]

New update adds some distinction between 60Hz and 50Hz. Your mode should load the PAL preset now, which should fit the requirement a little better, I hope. I also changed the H-PLL charge pump current, in case the presets have set it too high for these broad applications. Test with latest firmware:

starting
(WiFi): still connecting..
userprefs open ok
preset preference = 0
frame time lock = 0
preset slot = 1
frame lock method = 0
auto gain = 0
scanlines = 0
component output = 0
deinterlacer mode = 0
line filter = 1
peaking = 1
pal force 60 = 0
i2c: 1A
<reset>
Activity detected, input: RGBS/HV
VSync: present
HSync: present
RGBHV bypass 
post preset done (preset id: 1)
60Hz EDTV 
post preset done (preset id: 1)
large diff
ABHT: retry
large diff
ABHT: retry
large diff
ABHT: retry
large diff
ABHT: retry
large diff
ABHT: retry
large diff
ABHT: retry
large diff
ABHT: retry
large diff
ABHT: give up
(WiFi) AP mode (SSID: gbscontrol, pass 'qqqqqqqq'): Access 'gbscontrol.local' in your browser

Now there seems to be artifacting in the lower half of the picture: Closeup on artifacts (some colorful dots):

[ramapcsx2]

Okay, it's not picking up the 50Hz mode. Can you share a few lines of the info mode log ("i")?

[userx14]

The lower half of the picture does change/update if the input mda cable is reconnected.

h: 511 v: 193 PLL.00 A:7b7b7b S:0b.10 I:00 D:0666 m:14 ht:2557 vt:369 hpw: 331 s:ff W:31 F:36192 L:4
h: 511 v: 193 PLL.00 A:7b7b7b S:0b.10 I:00 D:0666 m:14 ht:2558 vt:369 hpw: 332 s:ff W:31 F:36192 L:4
h: 511 v: 193 PLL.00 A:7b7b7b S:0b.10 I:00 D:0664 m:14 ht:2558 vt:369 hpw: 331 s:ff W:31 F:36192 L:5
h: 511 v: 193 PLL.00 A:7b7b7b S:0b.10 I:00 D:0666 m:14 ht:2559 vt:369 hpw: 331 s:ff W:31 F:36192 L:4
h: 511 v: 193 PLL.00 A:7b7b7b S:0b.10 I:00 D:0666 m:14 ht:2558 vt:369 hpw: 332 s:ff W:31 F:36192 L:4
h: 511 v: 193 PLL.00 A:7b7b7b S:0b.10 I:00 D:0666 m:14 ht:2557 vt:369 hpw: 332 s:ff W:31 F:36192 L:5
h: 511 v: 193 PLL.00 A:7b7b7b S:0b.10 I:00 D:0666 m:14 ht:2558 vt:369 hpw: 331 s:ff W:31 F:36192 L:4
h: 511 v: 193 PLL.00 A:7b7b7b S:0b.10 I:00 D:0666 m:14 ht:2558 vt:369 hpw: 332 s:ff W:31 F:36192 L:4
h: 511 v: 193 PLL.00 A:7b7b7b S:0b.10 I:00 D:06e7 m:14 ht:2557 vt:369 hpw: 331 s:ff W:31 F:36192 L:5
h: 511 v: 193 PLL.00 A:7b7b7b S:0b.10 I:00 D:06e7 m:14 ht:2558 vt:369 hpw: 331 s:ff W:31 F:36192 L:5
h: 511 v: 193 PLL.00 A:7b7b7b S:0b.10 I:00 D:06e7 m:14 ht:2557 vt:369 hpw: 331 s:ff W:31 F:36192 L:5
h: 511 v: 193 PLL.00 A:7b7b7b S:0b.10 I:00 D:0666 m:14 ht:2558 vt:369 hpw: 331 s:ff W:31 F:36192 L:5
h: 511 v: 193 PLL.00 A:7b7b7b S:0b.10 I:00 D:0666 m:14 ht:2558 vt:369 hpw: 332 s:ff W:31 F:36192 L:4
h: 511 v: 193 PLL.00 A:7b7b7b S:0b.10 I:00 D:0666 m:14 ht:2558 vt:369 hpw: 332 s:ff W:31 F:36192 L:4
h: 511 v: 193 PLL.00 A:7b7b7b S:0b.10 I:00 D:0666 m:14 ht:2557 vt:369 hpw: 331 s:ff W:31 F:36192 L:5
h: 511 v: 193 PLL.00 A:7b7b7b S:0b.10 I:00 D:0666 m:14 ht:2559 vt:369 hpw: 332 s:ff W:31 F:36192 L:4
h: 511 v: 193 PLL.00 A:7b7b7b S:0b.10 I:00 D:06e7 m:14 ht:2558 vt:369 hpw: 332 s:ff W:31 F:36192 L:5
h: 511 v: 193 PLL.00 A:7b7b7b S:0b.10 I:00 D:0666 m:14 ht:2558 vt:369 hpw: 332 s:ff W:31 F:36192 L:5
h: 511 v: 193 PLL.00 A:7b7b7b S:0b.10 I:00 D:0666 m:14 ht:2557 vt:369 hpw: 332 s:ff W:31 F:36192 L:4
h: 511 v: 193 PLL.00 A:7b7b7b S:0b.10 I:00 D:0666 m:14 ht:2558 vt:369 hpw: 332 s:ff W:31 F:36192 L:4
h: 511 v: 193 PLL.00 A:7b7b7b S:0b.10 I:00 D:0666 m:14 ht:2558 vt:369 hpw: 332 s:ff W:31 F:36192 L:5
h: 511 v: 193 PLL.00 A:7b7b7b S:0b.10 I:00 D:0666 m:14 ht:2558 vt:369 hpw: 332 s:ff W:31 F:36192 L:4
h: 511 v: 193 PLL.00 A:7b7b7b S:0b.10 I:00 D:0666 m:14 ht:2558 vt:369 hpw: 332 s:ff W:31 F:36192 L:5
h: 511 v: 193 PLL.00 A:7b7b7b S:0b.10 I:00 D:0666 m:14 ht:2558 vt:369 hpw: 331 s:ff W:31 F:36192 L:5
h: 511 v: 193 PLL.00 A:7b7b7b S:0b.10 I:00 D:0666 m:14 ht:2558 vt:369 hpw: 331 s:ff W:31 F:36192 L:4
h: 511 v: 193 PLL.00 A:7b7b7b S:0b.10 I:00 D:0676 m:14 ht:2558 vt:369 hpw: 332 s:ff W:31 F:36192 L:4
h: 511 v: 193 PLL.00 A:7b7b7b S:0b.10 I:00 D:0666 m:14 ht:2558 vt:369 hpw: 332 s:ff W:31 F:36192 L:5
h: 511 v: 193 PLL.00 A:7b7b7b S:0b.10 I:00 D:0664 m:14 ht:2559 vt:369 hpw: 332 s:ff W:31 F:36192 L:4
h: 511 v: 193 PLL.01 A:7b7b7b S:0b.10 I:00 D:0666 m:14 ht:2559 vt:369 hpw: 331 s:ff W:31 F:36192 L:4
h: 511 v: 193 PLL.01 A:7b7b7b S:0b.10 I:00 D:0666 m:14 ht:2557 vt:369 hpw: 332 s:ff W:31 F:36192 L:6
h: 511 v: 193 PLL.01 A:7b7b7b S:0b.10 I:00 D:06e7 m:14 ht:2558 vt:369 hpw: 332 s:ff W:31 F:36192 L:4
h: 511 v: 193 PLL.01 A:7b7b7b S:0b.10 I:00 D:0666 m:14 ht:2558 vt:369 hpw: 332 s:ff W:31 F:36192 L:4
h: 511 v: 193 PLL.01 A:7b7b7b S:0b.10 I:00 D:0666 m:14 ht:2559 vt:369 hpw: 332 s:ff W:31 F:36192 L:5
h: 511 v: 193 PLL.01 A:7b7b7b S:0b.10 I:00 D:0666 m:14 ht:2558 vt:369 hpw: 332 s:ff W:31 F:36192 L:4
h: 511 v: 193 PLL.01 A:7b7b7b S:0b.10 I:00 D:0666 m:14 ht:2558 vt:369 hpw: 331 s:ff W:31 F:36192 L:4
h: 511 v: 193 PLL.01 A:7b7b7b S:0b.10 I:00 D:0666 m:14 ht:2559 vt:369 hpw: 331 s:ff W:31 F:36192 L:5
h: 511 v: 193 PLL.01 A:7b7b7b S:0b.10 I:00 D:06c5 m:14 ht:2559 vt:369 hpw: 332 s:ff W:31 F:36192 L:4
h: 511 v: 193 PLL.01 A:7b7b7b S:0b.10 I:00 D:0666 m:14 ht:2558 vt:369 hpw: 332 s:ff W:31 F:36192 L:4
h: 511 v: 193 PLL.01 A:7b7b7b S:0b.10 I:00 D:0666 m:14 ht:2558 vt:369 hpw: 332 s:ff W:31 F:36192 L:5
h: 511 v: 193 PLL.01 A:7b7b7b S:0b.10 I:00 D:0666 m:14 ht:2558 vt:369 hpw: 332 s:ff W:31 F:36192 L:4
h: 511 v: 193 PLL.01 A:7b7b7b S:0b.10 I:00 D:0666 m:14 ht:2558 vt:369 hpw: 332 s:ff W:31 F:36192 L:4
h: 511 v: 193 PLL.01 A:7b7b7b S:0b.10 I:00 D:0666 m:14 ht:2558 vt:369 hpw: 332 s:ff W:31 F:36192 L:5
h: 511 v: 193 PLL.01 A:7b7b7b S:0b.10 I:00 D:0666 m:14 ht:2558 vt:369 hpw: 332 s:ff W:31 F:36192 L:5
h: 511 v: 193 PLL.01 A:7b7b7b S:0b.10 I:00 D:0666 m:14 ht:2557 vt:369 hpw: 331 s:ff W:31 F:36192 L:4
h: 511 v: 193 PLL.00 A:7b7b7b S:0b.10 I:00 D:0666 m:14 ht:2558 vt:369 hpw: 331 s:ff W:31 F:36192 L:6
h: 511 v: 193 PLL.00 A:7b7b7b S:0b.10 I:00 D:0664 m:14 ht:2558 vt:369 hpw: 332 s:ff W:31 F:36192 L:4
h: 511 v: 193 PLL.00 A:7b7b7b S:0b.10 I:00 D:0666 m:14 ht:2558 vt:369 hpw: 331 s:ff W:31 F:36192 L:4
h: 511 v: 193 PLL.00 A:7b7b7b S:0b.10 I:00 D:0666 m:14 ht:2557 vt:369 hpw: 331 s:ff W:31 F:36192 L:5
h: 511 v: 193 PLL.00 A:7b7b7b S:0b.10 I:00 D:0666 m:14 ht:2558 vt:369 hpw: 332 s:ff W:31 F:36192 L:4
h: 511 v: 193 PLL.00 A:7b7b7b S:0b.10 I:00 D:0666 m:14 ht:2558 vt:369 hpw: 331 s:ff W:31 F:36192 L:5
h: 511 v: 193 PLL.00 A:7b7b7b S:0b.10 I:00 D:0666 m:14 ht:2559 vt:369 hpw: 331 s:ff W:31 F:36192 L:5
h: 511 v: 193 PLL.00 A:7b7b7b S:0b.10 I:00 D:0666 m:14 ht:2558 vt:369 hpw: 331 s:ff W:31 F:36192 L:4
h: 511 v: 193 PLL.00 A:7b7b7b S:0b.10 I:00 D:0666 m:14 ht:2558 vt:369 hpw: 332 s:ff W:31 F:36192 L:4
h: 511 v: 193 PLL.00 A:7b7b7b S:0b.10 I:00 D:0666 m:14 ht:2559 vt:369 hpw: 331 s:ff W:31 F:36192 L:5
h: 511 v: 193 PLL.00 A:7b7b7b S:0b.10 I:00 D:0666 m:14 ht:2558 vt:369 hpw: 332 s:ff W:31 F:36192 L:4
h: 511 v: 193 PLL.00 A:7b7b7b S:0b.10 I:00 D:0666 m:14 ht:2558 vt:369 hpw: 332 s:ff W:31 F:36192 L:5
h: 511 v: 193 PLL.00 A:7b7b7b S:0b.10 I:00 D:0666 m:14 ht:2559 vt:369 hpw: 332 s:ff W:31 F:36192 L:6
h: 511 v: 193 PLL.00 A:7b7b7b S:0b.10 I:00 D:0666 m:14 ht:2557 vt:369 hpw: 331 s:ff W:31 F:36192 L:4
h: 511 v: 193 PLL.00 A:7b7b7b S:0b.10 I:00 D:0666 m:14 ht:2558 vt:369 hpw: 331 s:ff W:31 F:36192 L:4
h: 511 v: 193 PLL.00 A:7b7b7b S:0b.10 I:00 D:06e7 m:14 ht:2557 vt:369 hpw: 331 s:ff W:31 F:36192 L:5
h: 511 v: 193 PLL.00 A:7b7b7b S:0b.10 I:00 D:0666 m:14 ht:2558 vt:369 hpw: 331 s:ff W:31 F:36192 L:4
h: 511 v: 193 PLL.00 A:7b7b7b S:0b.10 I:00 D:0666 m:14 ht:2558 vt:369 hpw: 331 s:ff W:31 F:36192 L:4
h: 511 v: 193 PLL.00 A:7b7b7b S:0b.10 I:00 D:0666 m:14 ht:2557 vt:369 hpw: 331 s:ff W:31 F:36192 L:6
h: 511 v: 193 PLL.00 A:7b7b7b S:0b.10 I:00 D:0666 m:14 ht:2557 vt:369 hpw: 332 s:ff W:31 F:36192 L:5
h: 511 v: 193 PLL.00 A:7b7b7b S:0b.10 I:00 D:0666 m:14 ht:2558 vt:369 hpw: 331 s:ff W:31 F:36192 L:4
h: 511 v: 193 PLL.00 A:7b7b7b S:0b.10 I:00 D:0666 m:14 ht:2558 vt:369 hpw: 332 s:ff W:31 F:36192 L:5
h: 511 v: 193 PLL.00 A:7b7b7b S:0b.10 I:00 D:0666 m:14 ht:2559 vt:369 hpw: 332 s:ff W:31 F:36192 L:4
h: 511 v: 193 PLL.00 A:7b7b7b S:0b.10 I:00 D:0666 m:14 ht:2558 vt:369 hpw: 332 s:ff W:31 F:36192 L:4
h: 511 v: 193 PLL.00 A:7b7b7b S:0b.10 I:00 D:06e7 m:14 ht:2558 vt:369 hpw: 331 s:ff W:31 F:36192 L:5
h: 511 v: 193 PLL.00 A:7b7b7b S:0b.10 I:00 D:0666 m:14 ht:2558 vt:369 hpw: 331 s:ff W:31 F:36192 L:5

[ramapcsx2]

Update incoming :)

[userx14]

Also works on the newer monitor now, the upper half of the picture is updating while the lower half stays frozen.

[ramapcsx2]

Update pushed. It will fix the issue you see and hopefully do the other automatic adjustments in spec with your monitors.

From here on, as long as you get a mostly okay image, you can do all sorts of image manipulation via the web interface (as scaling mode now works).

[userx14]

Update pushed. It will fix the issue you see and hopefully do the other automatic adjustments in spec with your monitors.

From here on, as long as you get a mostly okay image, you can do all sorts of image manipulation via the web interface (as scaling mode now works).

Nice, seems to work now.

[ramapcsx2]

Okay, great! I assume you'll have to adjust scaling and then image position quite a bit, to get everything on screen. The preset loaded is optimized for real PAL, then stretched out a bit for game consoles that usually don't make use of all available pixels / lines.

In effect this just means that sharpness won't be quite optimal, but your use case sounds more like you just wanted to be able to read what's being displayed, not enjoy some Mario ;)

[userx14]

Okay, great! I assume you'll have to adjust scaling and then image position quite a bit, to get everything on screen. The preset loaded is optimized for real PAL, then stretched out a bit for game consoles that usually don't make use of all available pixels / lines.

In effect this just means that sharpness won't be quite optimal, but your use case sounds more like you just wanted to be able to read what's being displayed, not enjoy some Mario ;)

Exactly, it looks great in comparison to the old crt :), the only thing that is still noticable is a "bar" which is about 5% of the screensize and scrolling from top to bottom where it shifts all pixels just a little bit. It takes about half a secont from top to bottom and is horizontal. But this could be also present on the source signal or due to the lack of modifications I've done to the gbs board. This is not a problem for me, just if it would be an easy fix it might be good if someone wants to play games on MDA. Could also upload a video for the ghosting bar.

Setting the "d" output for scaling options to fit on the full hd panel:

0x2C, // s0_40
0x95, // s0_41
0x0, // s0_42
0x19, // s0_43
0x25, // s0_44
0x11, // s0_45
0x7F, // s0_46
0x17, // s0_47
0xEB, // s0_48
0xB, // s0_49
0x4, // s0_4A
0x0, // s0_4B
0x0, // s0_4C
0x2A, // s0_4D
0x0, // s0_4E
0x3C, // s0_4F
0x0, // s0_50
0x0, // s0_51
0x67, // s0_52
0x0, // s0_53
0x0, // s0_54
0x0, // s0_55
0x0, // s0_56
0x0, // s0_57
0x0, // s0_58
0xFF, // s0_59
0x0, // s0_5A
0x0, // s0_5B
0x0, // s0_5C
0x0, // s0_5D
0x0, // s0_5E
0x0, // s0_5F
0x24, // s0_90
0x0, // s0_91
0x47, // s0_92
0x54, // s0_93
0x0, // s0_94
0x3E, // s0_95
0x32, // s0_96
0x0, // s0_97
0x0, // s0_98
0x0, // s0_99
0x0, // s0_9A
0x0, // s0_9B
0x0, // s0_9C
0x0, // s0_9D
0x0, // s0_9E
0x0, // s0_9F
0x20, // s1_0
0xE0, // s1_1
0x64, // s1_2
0x0, // s1_3
0x0, // s1_4
0x0, // s1_5
0x0, // s1_6
0x0, // s1_7
0x0, // s1_8
0x0, // s1_9
0x0, // s1_A
0x50, // s1_B
0xCA, // s1_C
0x72, // s1_D
0x46, // s1_E
0x5, // s1_F
0x2, // s1_10
0x0, // s1_11
0x4, // s1_12
0x0, // s1_13
0x4, // s1_14
0x4, // s1_15
0xB, // s1_16
0x0, // s1_17
0x24, // s1_18
0x0, // s1_19
0x2C, // s1_1A
0x0, // s1_1B
0xC, // s1_1C
0x0, // s1_1D
0xE, // s1_1E
0x0, // s1_1F
0x0, // s1_20
0x0, // s1_21
0x47, // s1_22
0x5, // s1_23
0x0, // s1_24
0x0, // s1_25
0x8, // s1_26
0x1, // s1_27
0x3C, // s1_28
0x0, // s1_29
0x0, // s1_2A
0x15, // s1_2B
0x2, // s1_2C
0x0, // s1_2D
0x0, // s1_2E
0x0, // s1_2F
0x2, // s3_0
0xF9, // s3_1
0x58, // s3_2
0x46, // s3_3
0xC4, // s3_4
0x8, // s3_5
0xE, // s3_6
0x5, // s3_7
0x60, // s3_8
0x0, // s3_9
0x8, // s3_A
0x60, // s3_B
0x9, // s3_C
0x1, // s3_D
0x50, // s3_E
0x0, // s3_F
0xC4, // s3_10
0xE8, // s3_11
0x14, // s3_12
0x54, // s3_13
0xC4, // s3_14
0x1, // s3_15
0x1F, // s3_16
0x22, // s3_17
0x29, // s3_18
0x1, // s3_19
0x0, // s3_1A
0x0, // s3_1B
0x0, // s3_1C
0x0, // s3_1D
0x10, // s3_1E
0x0, // s3_1F
0x0, // s3_20
0x0, // s3_21
0x0, // s3_22
0x0, // s3_23
0x60, // s3_24
0x3, // s3_25
0x40, // s3_26
0xCF, // s3_27
0x26, // s3_28
0x7, // s3_29
0x1, // s3_2A
0x91, // s3_2B
0xE0, // s3_2C
0x2F, // s3_2D
0x20, // s3_2E
0xF0, // s3_2F
0x40, // s3_30
0x3A, // s3_31
0x88, // s3_32
0x0, // s3_33
0x0, // s3_34
0x80, // s3_35
0x1C, // s3_36
0x28, // s3_37
0x0, // s3_38
0x0, // s3_39
0x0, // s3_3A
0x0, // s3_3B
0x0, // s3_3C
0x0, // s3_3D
0x80, // s3_3E
0x0, // s3_3F
0x3, // s3_40
0x3, // s3_41
0x40, // s3_42
0xF, // s3_43
0xF9, // s3_44
0xFF, // s3_45
0xF9, // s3_46
0x18, // s3_47
0xF9, // s3_48
0x10, // s3_49
0xF9, // s3_4A
0x20, // s3_4B
0xF9, // s3_4C
0xA, // s3_4D
0x1B, // s3_4E
0x1E, // s3_4F
0x30, // s3_50
0x0, // s3_51
0x70, // s3_52
0x8, // s3_53
0x24, // s3_54
0xA, // s3_55
0x8B, // s3_56
0x0, // s3_57
0x1A, // s3_58
0x0, // s3_59
0x0, // s3_5A
0x1A, // s3_5B
0x0, // s3_5C
0xC4, // s3_5D
0x3F, // s3_5E
0x4, // s3_5F
0x4, // s3_60
0x9B, // s3_61
0x80, // s3_62
0x9, // s3_63
0xE9, // s3_64
0xFF, // s3_65
0x7F, // s3_66
0x40, // s3_67
0xD2, // s3_68
0xD, // s3_69
0xD8, // s3_6A
0xFF, // s3_6B
0x3F, // s3_6C
0x0, // s3_6D
0x0, // s3_6E
0x0, // s3_6F
0x0, // s3_70
0x8, // s3_71
0x0, // s3_72
0xBC, // s3_73
0x5, // s3_74
0x0, // s3_75
0x0, // s3_76
0x0, // s3_77
0x0, // s3_78
0x0, // s3_79
0x0, // s3_7A
0x0, // s3_7B
0x0, // s3_7C
0x0, // s3_7D
0x0, // s3_7E
0x0, // s3_7F
0x7, // s4_0
0x30, // s4_1
0x0, // s4_2
0x0, // s4_3
0x32, // s4_4
0x11, // s4_5
0x42, // s4_6
0x30, // s4_7
0x1, // s4_8
0x94, // s4_9
0x11, // s4_A
0x7F, // s4_B
0x0, // s4_C
0x74, // s4_D
0x0, // s4_E
0x6, // s4_F
0x0, // s4_10
0x92, // s4_11
0x7, // s4_12
0x1, // s4_13
0x96, // s4_14
0x5, // s4_15
0x0, // s4_16
0x0, // s4_17
0x0, // s4_18
0x0, // s4_19
0x50, // s4_1A
0x11, // s4_1B
0x0, // s4_1C
0x0, // s4_1D
0x0, // s4_1E
0x0, // s4_1F
0x0, // s4_20
0x43, // s4_21
0x1, // s4_22
0x1F, // s4_23
0x0, // s4_24
0x70, // s4_25
0x15, // s4_26
0xFF, // s4_27
0xFF, // s4_28
0x1F, // s4_29
0x0, // s4_2A
0x87, // s4_2B
0x20, // s4_2C
0x3D, // s4_2D
0x0, // s4_2E
0x0, // s4_2F
0x0, // s4_30
0x0, // s4_31
0x0, // s4_32
0x10, // s4_33
0x0, // s4_34
0x0, // s4_35
0x10, // s4_36
0x50, // s4_37
0x1, // s4_38
0x10, // s4_39
0x1, // s4_3A
0x0, // s4_3B
0x0, // s4_3C
0x0, // s4_3D
0x3, // s4_3E
0x0, // s4_3F
0x0, // s4_40
0x0, // s4_41
0x6C, // s4_42
0x0, // s4_43
0x0, // s4_44
0x20, // s4_45
0x5, // s4_46
0x0, // s4_47
0x20, // s4_48
0x5, // s4_49
0x10, // s4_4A
0x14, // s4_4B
0x0, // s4_4C
0xF0, // s4_4D
0x24, // s4_4E
0x3C, // s4_4F
0x40, // s4_50
0x0, // s4_51
0x0, // s4_52
0x0, // s4_53
0x1, // s4_54
0x0, // s4_55
0x0, // s4_56
0x0, // s4_57
0x0, // s4_58
0x80, // s4_59
0x0, // s4_5A
0xCC, // s4_5B
0x0, // s4_5C
0x0, // s4_5D
0x0, // s4_5E
0x0, // s4_5F
0x10, // s5_0
0x0, // s5_1
0x58, // s5_2
0x31, // s5_3
0x2, // s5_4
0x0, // s5_5
0x3F, // s5_6
0x43, // s5_7
0x3F, // s5_8
0x7B, // s5_9
0x7B, // s5_A
0x7B, // s5_B
0x2, // s5_C
0x0, // s5_D
0x0, // s5_E
0x0, // s5_F
0x0, // s5_10
0xB2, // s5_11
0xFA, // s5_12
0x9, // s5_13
0x0, // s5_14
0x0, // s5_15
0x6F, // s5_16
0x5, // s5_17
0x81, // s5_18
0x9F, // s5_19
0x0, // s5_1A
0x0, // s5_1B
0x0, // s5_1C
0x0, // s5_1D
0x80, // s5_1E
0x5, // s5_1F
0x2, // s5_20
0x20, // s5_21
0x10, // s5_22
0x0, // s5_23
0xB, // s5_24
0x0, // s5_25
0x8, // s5_26
0x0, // s5_27
0x0, // s5_28
0x0, // s5_29
0x3, // s5_2A
0x0, // s5_2B
0x0, // s5_2C
0x2, // s5_2D
0x0, // s5_2E
0x2, // s5_2F
0x0, // s5_30
0x2F, // s5_31
0x0, // s5_32
0x2E, // s5_33
0x5, // s5_34
0x25, // s5_35
0x0, // s5_36
0x10, // s5_37
0x0, // s5_38
0x0, // s5_39
0x3, // s5_3A
0x0, // s5_3B
0x0, // s5_3C
0x0, // s5_3D
0x20, // s5_3E
0x4, // s5_3F
0x7, // s5_40
0x16, // s5_41
0x0, // s5_42
0x38, // s5_43
0x0, // s5_44
0x4, // s5_45
0x0, // s5_46
0x40, // s5_47
0x0, // s5_48
0x4, // s5_49
0x0, // s5_4A
0x34, // s5_4B
0x0, // s5_4C
0x38, // s5_4D
0x0, // s5_4E
0x38, // s5_4F
0x0, // s5_50
0x2, // s5_51
0x0, // s5_52
0x6, // s5_53
0x0, // s5_54
0x0, // s5_55
0x24, // s5_56
0xC4, // s5_57
0x5, // s5_58
0x0, // s5_59
0x1, // s5_5A
0x0, // s5_5B
0x3, // s5_5C
0x2, // s5_5D
0x0, // s5_5E
0x0, // s5_5F
0x0, // s5_60
0x0, // s5_61
0x0, // s5_62
0xF, // s5_63
0x0, // s5_64
0x0, // s5_65
0x0, // s5_66
0x0, // s5_67
0x0, // s5_68
0x0, // s5_69
0x0, // s5_6A
0x0, // s5_6B
0x0, // s5_6C
0x0, // s5_6D
0x0, // s5_6E
0x0, // s5_6F
};

[userx14]

I got a slow motion capture of it with my phone where 2 seconds captured are about 8 seconds video slowmotion.zip

[ramapcsx2]

Hmm, this looks unfamiliar. It might be an artifact of the rather poor H-PLL lock (I noticed that the display is slightly wobbly, a sign of the Sync Processor not being in best phase). To check the SP phase, you could send "vvvv" for a few times, check the readout to see how this works (it loops). There will be a spot where the display wobble gets worse, and hopefully a spot where it gets better. Automating this process is a long term goal of this project.

Also, the source unfortunately has that mesh effect that shows ADC / horizontal scaling imperfections well. If this annoys you (like it does me :p), you can try in/decreasing horizontal scaling a few notches, until it reduces or disappears completely. Automating that process is an even longer term goal ;p

[userx14]

Hmm, this looks unfamiliar. It might be an artifact of the rather poor H-PLL lock (I noticed that the display is slightly wobbly, a sign of the Sync Processor not being in best phase). To check the SP phase, you could send "vvvv" for a few times, check the readout to see how this works (it loops). There will be a spot where the display wobble gets worse, and hopefully a spot where it gets better. Automating this process is a long term goal of this project.

Also, the source unfortunately has that mesh effect that shows ADC / horizontal scaling imperfections well. If this annoys you (like it does me :p), you can try in/decreasing horizontal scaling a few notches, until it reduces or disappears completely. Automating that process is an even longer term goal ;p

changing the H-PLL lock does not seem to help with the scrolling through distortion. It makes the rest of the picutre more stable though. Inreasing the PLL divider to A1F does nearly completely eliminated the vertical bars in the picture.

Final Result (just experimented if the potentiometers change something 😁, the dark lines are not as noticable on the monitor, my camera seems to enhance the contrast there quiet a bit):

Let me know if I should/ can test something new if you have some update for the project.

Tanks for the great help, awsome project 👍

[ramapcsx2]

Alright, glad you like it.

If you just make sure not to cheat on that diesel test, that'll be great ;)

[melo1]

Impressive - I'm repairing an old Bosch tester at the moment and have similar problems. My old screen is not repairable anymore and I replaced it with a TFT. The output is a composite signal and the destination a 800:600 TFT screen. It's possible, that Gutmann used the same technology to connect their screens. If I use a 4:3 resolution I have also problems with the v-sync.

[userx14]

Impressive - I'm repairing an old Bosch tester at the moment and have similar problems. My old screen is not repairable anymore and I replaced it with a TFT. The output is a composite signal and the destination a 800:600 TFT screen. It's possible, that Gutmann used the same technology to connect their screens. If I use a 4:3 resolution I have also problems with the v-sync.

800x600 sounds like it is to high of a resolution to be mda though, more like ega or vga.

[melo1]

The output is something like 640x40 at about 60Hz. It's an composite signal which I send over the green channel (sync on green). With original firmware I get a picture but it's not stable. With gbs control it's much better but the 4:3 resolutions are rolling from top to bottom. At the moment I have no idea how to solve the problem and have not tested very much. The tester is very huge an I have to go there with my notebook to play around.

[userx14]

The output is something like 640x40 at about 60Hz. It's an composite signal which I send over the green channel (sync on green). With original firmware I get a picture but it's not stable. With gbs control it's much better but the 4:3 resolutions are rolling from top to bottom. At the moment I have no idea how to solve the problem and have not tested very much.

Oh sorry, I missunderstood, you were refering to the monitor you want to connect the signal from the gbs to.

The tester is very huge an I have to go there with my notebook to play around.

I think it is possible to connect to the esp over wifi and access the website with a phone. And if I read the code correctelly one can use "x" to toggle uopt->preferScalingRgbhv. https://github.com/ramapcsx2/gbs-control/blob/b9265e4025730aff7e0a4dbb82ac862eb9ba1b6a/gbs-control.ino#L9087-L9097 But I have not tested it with the lastest version yet.

[melo1]

The output is something like 640x40 at about 60Hz. It's an composite signal which I send over the green channel (sync on green). With original firmware I get a picture but it's not stable. With gbs control it's much better but the 4:3 resolutions are rolling from top to bottom. At the moment I have no idea how to solve the problem and have not tested very much.

Oh sorry, I missunderstood, you were refering to the monitor you want to connect the signal from the gbs to.

The tester is very huge an I have to go there with my notebook to play around.

I think it is possible to connect to the esp over wifi and access the website with a phone. And if I read the code correctelly one can use "x" to toggle uopt->preferScalingRgbhv.

https://github.com/ramapcsx2/gbs-control/blob/b9265e4025730aff7e0a4dbb82ac862eb9ba1b6a/gbs-control.ino#L9087-L9097

But I have not tested it with the lastest version yet.

Thank you - I'll check that.

[andreacampanella]

Hello, I've been pointed to this ticket from another one.

It seems you all be having success getting MDA into the GBS, I'm just wondering how am I supposed to connect it, does R,G,B,H,V goes straight into the VGA input?

isn't MDA 5v and VGA 0.7v max?

[userx14]

@andreacampanella I'm using this adapter, please don't look to close at the soldering quality 😄 . I've connected all 3 color inputs (r,g,b) together and used a 330 ohm resistor to connect with the video pin of the hercules card. The build is about 3 years ago, so I don't remember every detail, but as far as I know the though process was as follows:

The rgb input should be terminated with 75 ohm, so when uising the 330 ohm resistor one would get a voltage of 0.92 V from the 5V mda voltage. In the datasheed it says that the default adc range is 0 mV - 770 mV, but this full scale range seems to be adjustable up to 1 V. Since I need a black and white image 920 mV worked for me.

As far as I know Hsync and Vsync are TTL for both VGA and MDA. Even though I was too lazy to modify the 500 ohm termination with the additional 100 ohm resisor (https://github.com/ramapcsx2/gbs-control/wiki/Inputs:-SCART-adapter,-optional-sync-stripper) it still seems to work, but I guess that can vary from board to board.

H sync and V sync are just directelly connected (grey, yellow).

That's the connector that is directely connected to the mda card:

And there's the gbs side:

Best Benjamin

[A-Small-Mice]

@andreacampanella

To get MDA/Hercules, I used a tool named GBS-CGA/EGA on the following links: https://github.com/jtsiomb/gbs-cgaega https://github.com/A-Small-Mice/gbs-cgaega-pld-files-for-improved-colors

GBS Control tries to synchronize at 18 khz, but it should fail to get there in the end. I figured out a good solution that as follows.

1. When the GBS Control first begins to get the MDA signal, the syncronization is normal for about 2 seconds.
2. Turn off 'Sync Watcher' at that time in the control panel of GBS Control.

• Changing resolution temporarily restores the syncronization.
• This must be done before GBS Control completely loses synchronization.