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rapidstream-org / rapidstream-tapa

RapidStream TAPA compiles task-parallel HLS program into high-frequency FPGA accelerators.
https://tapa.rtfd.io
MIT License
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AXI-Lite control signals are not generated for a stream-in, stream-out function #119

Closed vkomenda closed 2 years ago

vkomenda commented 2 years ago

Vivado synthesis fails for this function which has streams as inputs and a stream as the output. Is there a quick fix for that?

ERROR: [Synth 8-448] named port connection 'ap_start' does not exist for instance 'compute_0' of module 'compute'
ERROR: [Synth 8-448] named port connection 'ap_done' does not exist for instance 'compute_0' of module 'compute'
ERROR: [Synth 8-448] named port connection 'ap_idle' does not exist for instance 'compute_0' of module 'compute'
ERROR: [Synth 8-448] named port connection 'ap_ready' does not exist for instance 'compute_0' of module 'compute'
vkomenda commented 2 years ago

I missed out a conflicting HLS pragma. With that being removed control signals are generated OK.