what is "CRITICAL IO module __rs_pt_Solver_inner_100_inst_100 has no assigned slots"?

[fan-sun]

I followed the steps from the rapidstream-demo example to write floorplan_config.json, impl_config.json, and u55c_device.json, where the .xo file is from my own design. However, when running run_tapaopt.sh, I encountered the following error: CRITICAL IO module rs_pt_Solver_inner_100_inst_100 has no assigned slots. I have carefully checked the floorplan_config.json, impl_config.json, and u55c_device.json files, and they seem correct. I suspect the issue might be that my design violates some rules of RapidStream, but I don't understand the specific cause of the error. How should I modify it? Below is the error message and the log file: INFO Total used resources: ff=361460 lut=445395 dsp=832 bram_18k=2048 uram=640 INFO Checkpointing synthesis project to /home/sun/FPGA/Test/My/work/run/passes/4-synth.json INFO Preprocess done INFO AutoBridge main CRITICAL IO module rs_pt_Solver_inner_100_inst_100 has no assigned slots rapidstream.log

[fan-sun]

I also suspect that there may be an issue with the version of TAPA I used when generating the .xo file. I installed TAPA using this command: sh -c "$(curl -fsSL tapa.rapidstream.sh)", but it seems that this installation doesn't include the tapac command. Therefore, I used the command from this link for installation: https://github.com/UCLA-VAST/tapa/blob/release/install.sh.

[Licheng-Guo]

https://tapa.readthedocs.io/en/main/getting_started.html

[fan-sun]

https://tapa.readthedocs.io/en/main/getting_started.html

Here is my floorplan_config.json, where I have individually assigned each port to a specific region. Are you suggesting using wildcards for the complete assignment instead of individual assignments? floorplan_config.json

[Licheng-Guo]

Please share how to reproduce the issue

[Licheng-Guo]

You missed the "maxi" prefix in your port pre assignment

[fan-sun]

You missed the "maxi" prefix in your port pre assignment

Thank you very much, I indeed missed the "maxi" prefix. I successfully continued running my design, but I encountered new warnings and errors. Does this mean that my design is too poor and has caused these issues? This is the warning message: WARNING Found instances with large amount of wire connections. If an instance has both a large number of connections and a large area, it may cause design partition to fail. Each instance group contains all instances that must be partitioned together (might be connected by non-pipeline interface, or set by users to be grouped together, or assigned to the same region by user, etc).

[fan-sun]

This is the beginning part of the error message: ERROR Showing missing interface information: INFO Checking for unknown interfaces in the project... ERROR Showing which instances are grouped together by non-pipeline interface: ERROR ERROR The following modules were grouped together: ERROR - MergeResWrite_0 ERROR FF=6 LUT=27 DSP=0 BRAM_18K=0 URAM=0 ERROR - Solver_inner_inst___tapa_fsm_unit_MergeResWrite_0 ERROR FF=0 LUT=0 DSP=0 BRAM_18K=0 URAM=0 ERROR The total area of this group is: FF=6 LUT=27 BRAM_18K=0 DSP=0 URAM=0

[fan-sun]

The error message seems to indicate that the interface has not been pipelined, but the interfaces between different instances are declared using tapa::stream. How should I pipeline them?

[Licheng-Guo]

Hey as I've mentioned many times before, please share how to reproduce the issue, otherwise we don't know what is wrong. You can send over your design and scripts to my email or add me to your git repo.