task graph generation in software emulation

rapidstream-org / rapidstream-tapa

RapidStream-TAPA compiles task-parallel HLS program into high-frequency FPGA accelerators.

https://tapa.rtfd.io

MIT License

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task graph generation in software emulation #96

Open linghaosong opened 2 years ago

linghaosong commented 2 years ago

Just find the _taskgraph.dot amazing! I wonder if the task graph could be generated in software simulation phase? So that I can quickly verify the module connection is what I desired without doing HLS.