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rasmusto / vtr-verilog-to-routing

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VPR clustering - asserts with certain architecture #23

Closed GoogleCodeExporter closed 9 years ago

GoogleCodeExporter commented 9 years ago 
What steps will reproduce the problem?
1. Run vpr with attached arch & circuit.

What is the expected output? What do you see instead?

The code asserts in cluster_legality.c:198:

        if (curr_ext_input > ext_output_rr_node_index
                || curr_ext_output > ext_clock_rr_node_index
                || curr_ext_clock > max_ext_index) {
            /* failed, not enough pins of proper type, overran index */
            assert(0);
        }

This could be an issue with the architecture file; however, it is fine as far 
as I can tell.

Original issue reported on code.google.com by jeffrey....@gmail.com on 8 May 2012 at 7:15

Attachments:

GoogleCodeExporter commented 9 years ago 
Known problem from the latest change towards smarter packing.  Debugging it at 
high priority.

Original comment by JasonKai...@gmail.com on 9 May 2012 at 8:27

GoogleCodeExporter commented 9 years ago

Original comment by JasonKai...@gmail.com on 9 May 2012 at 8:28

GoogleCodeExporter commented 9 years ago

Original comment by jeffrey....@gmail.com on 10 May 2012 at 4:15

GoogleCodeExporter commented 9 years ago

Original comment by JasonKai...@gmail.com on 10 May 2012 at 8:24