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rasmusto / vtr-verilog-to-routing

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Testing of Heterogenous blocks #66

Closed GoogleCodeExporter closed 9 years ago

GoogleCodeExporter commented 9 years ago 
I had modified the fir.v benchmark to test my dsp block instead of the fpu 
multipler and adder used. I have not been able to generate the blif file with 
the hard bocks embedded to test my architecture. I have attached both my 
architecture and the benchmark file

What version of the product are you using? On what operating system?
the latest version of VTR

Original issue reported on code.google.com by david.dh...@gmail.com on 26 Jul 2013 at 8:25

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GoogleCodeExporter commented 9 years ago 
The issue is with the verilog file. The dsp hard blocks you are instantiating 
is connected with wires/regs that are not driven. As such, Odin crashes. I made 
a small update to Odin that will indicate the undriven pin and terminate 
gracefully.

Original comment by kenneth....@gmail.com on 26 Jul 2013 at 5:53

GoogleCodeExporter commented 9 years ago

Original comment by kenneth....@gmail.com on 26 Jul 2013 at 5:54