Error in reading blif file in VPR tool

[GoogleCodeExporter]

What steps will reproduce the problem?
1.I regenerated MCNC benchmarks to implement them into an architecture.
2.
3.

What is the expected output? What do you see instead?
for some benchmarks the following error is presented:
vpr: SRC/base/read_blif.c:1342: void check_net(boolean): Assertion 
`count_inputs == logical_block_input_count[i]' failed.
Aborted (core dumped)

What version of the product are you using? On what operating system?
I use vtr 7.0

Please provide any additional information below.
One of the benchmarks is attached.

Original issue reported on code.google.com by 7thi...@gmail.com on 5 Dec 2014 at 7:55

Attachments:

• ex5p_HL.blif

[GoogleCodeExporter]

It looks like an architecture mismatch.  Can you attach your architecture to 
this bug report?

Original comment by JasonKai...@gmail.com on 5 Dec 2014 at 8:55

[GoogleCodeExporter]

Yes of course. Attached file is my architecture.
Thanks

Original comment by 7thi...@gmail.com on 5 Dec 2014 at 9:04

Attachments:

• my_arch.xml

[GoogleCodeExporter]

You need to specify unconnected ports with the signal "unconn".  For an example 
of this, look at a blif circuit in our vtr benchmarks such as 
vtr_flow\benchmarks\vtr_benchmarks_blif\diffeq1.blif

I recommend also creating a tiny blif netlist with exactly the new logic 
elements that you want to try so that you get a working example through our 
flow.  That way, it is easier to debug.  The error messages in our code can use 
some work.  Start with something tiny so that when a problem happens, then it's 
easier to figure out what's going on.

Original comment by JasonKai...@gmail.com on 6 Dec 2014 at 2:43