The timing PIO program was side setting the pixel clock even if PICO_SCANVIDEO_ENABLE_CLOCK_PIN is zero (disabled). The side set pin was not explicitly defined but defaulted to GPIO 0. With the VGA demo board, this pin is the LSB of the red signal so may not have been visible Also it may have been overridden by the colour PIO.
However, with other pin assignments, this side set can cause problems. If the sync pulses are set to be on GPIO 0 & 1, then the side set pixel clock overrides the HSYNC signal.
This pull request amends the code to dynamically remove the side set from the timing PIO program before loading the program into the PIO if PICO_SCANVIDEO_ENABLE_CLOCK_PIN is zero. It should be noted that the existing code already dynamically edits the PIO program to set the polarity of the pixel clock.
The timing PIO program was side setting the pixel clock even if PICO_SCANVIDEO_ENABLE_CLOCK_PIN is zero (disabled). The side set pin was not explicitly defined but defaulted to GPIO 0. With the VGA demo board, this pin is the LSB of the red signal so may not have been visible Also it may have been overridden by the colour PIO.
However, with other pin assignments, this side set can cause problems. If the sync pulses are set to be on GPIO 0 & 1, then the side set pixel clock overrides the HSYNC signal.
This pull request amends the code to dynamically remove the side set from the timing PIO program before loading the program into the PIO if PICO_SCANVIDEO_ENABLE_CLOCK_PIN is zero. It should be noted that the existing code already dynamically edits the PIO program to set the polarity of the pixel clock.