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FreeRTOS SMP: SPI0 RX FIFO Interrupt Not Working on Core1 #1657

Closed hajmedwissem closed 4 months ago

hajmedwissem commented 7 months ago

Hi everyone,

I'm using FreeRTOS SMP to work on both core0 and core1. I have 6 tasks (3 in core0 and 3 in core1). In one of my tasks in core1, I use SPI0 in master mode and I enable the hardware interrupt in SPI0 RX FIFO using these lines:

hw_set_bits(&spi_get_hw(spi_port)->imsc, SPI_SSPIMSC_RTIM_BITS | SPI_SSPIMSC_RORIM_BITS | SPI_SSPIMSC_RXIM_BITS);
irq_set_exclusive_handler(SPI0_IRQ, SPI_RX_INTERRUPT);
irq_set_enabled(SPI0_IRQ, true);

However, when I receive data in SPI0 RX FIFO, the ISR is not called and my entire system stops (system crash).

I've read in a post that when the scheduler starts, this will disable all hardware interrupts and there is a way to handle the interrupt with FreeRTOS, but I still haven't found the answer.

Could anyone please help me with this problem?

Thank you.

kilograham commented 4 months ago

please post questions on the forums; https://forums.raspberrypi.com/viewforum.php?f=143