Hello,
1- when using makePads() it will create the pads that are located at the bottom of the pcb instead of the top. for exmaple if I have resistor that is on F.cu, it will make the pads that are in the bottom of the pcb.
2- Pad and net names are random when exporting to stp file. they show correct in freecad. What am I missing?
I am using kicad7 here is my code and my pcb
`from fcad_pcb import kicad
import Import
import FreeCAD as App
pcb = kicad.KicadFcad('/home/asepahvand/repo/voltage_divider/voltage_divider_routed.kicad_pcb')
board =pcb.make(copper_thickness={None:0.05, 0:0.04, 'B.Cu':0.09},board_thickness=1.53, combo=False, fuseCoppers=True)
Import.export([board],"/home/asepahvand/repo/voltage_divider/voltage_divider.stp")
Hello, 1- when using makePads() it will create the pads that are located at the bottom of the pcb instead of the top. for exmaple if I have resistor that is on F.cu, it will make the pads that are in the bottom of the pcb.
2- Pad and net names are random when exporting to stp file. they show correct in freecad. What am I missing?
I am using kicad7 here is my code and my pcb `from fcad_pcb import kicad import Import import FreeCAD as App pcb = kicad.KicadFcad('/home/asepahvand/repo/voltage_divider/voltage_divider_routed.kicad_pcb') board =pcb.make(copper_thickness={None:0.05, 0:0.04, 'B.Cu':0.09},board_thickness=1.53, combo=False, fuseCoppers=True) Import.export([board],"/home/asepahvand/repo/voltage_divider/voltage_divider.stp")
` vdiv.zip