Phase switching

[jack-h]

Add phase switching!

[jack-h]

Add blanking

[jack-h]

Uploaded in the v7.4 branch. Blanking not yet working

[jack-h]

@sr-cdf bitstreams now available (with much testing not done) in the v7.4 branch. These should switch by 180 degrees as discussed earlier in today's meeting.

[sr-cdf]

Should the switch be instantaneous? It seems slow on the DAC snapshot and I see variation in output power on a spectrum analyser.

Switching off (single tone dac snapshot):

Switching on ( pattern=[1,0], spectra_per_step=1, n_blank=0):

Test code...

(venv) [sam@sam1 ~]$ ipython
Python 3.10.11 (main, Apr  5 2023, 00:00:00) [GCC 12.2.1 20221121 (Red Hat 12.2.1-4)]
Type 'copyright', 'credits' or 'license' for more information
IPython 8.22.1 -- An enhanced Interactive Python. Type '?' for help.

In [1]: import souk_mkid_readout

In [2]: import time

In [3]: from numpy import *; from matplotlib.pyplot import *;ion()
Out[3]: <contextlib.ExitStack at 0x7f8250983e80>

In [4]: r = souk_mkid_readout.SoukMkidReadout('krm4',configfile='/home/sam/souk/souk-firmware/software/control_sw/config/souk-single-pipeline-krm-2G.yaml')

In [5]: r.program()
2024-09-11 12:46:34,944 - souk_mkid_readout.souk_mkid_readout:krm4:0 - INFO - Programming with /home/sam/souk/souk-firmware/firmware/src/souk_single_pipeline_krm/outputs/souk_single_pipeline_krm_2024-09-10_1340.fpg

In [6]: r.initialize()
2024-09-11 12:46:38,546 - souk_mkid_readout.souk_mkid_readout:krm4:0 - INFO - Initializing block (writable): fpga
2024-09-11 12:46:38,546 - souk_mkid_readout.souk_mkid_readout:krm4:0 - INFO - Initializing block (writable): rfdc
2024-09-11 12:46:38,606 - souk_mkid_readout.souk_mkid_readout:krm4:0 - INFO - Initializing block (writable): sync
2024-09-11 12:46:38,615 - souk_mkid_readout.souk_mkid_readout:krm4:0 - INFO - Initializing block (writable): input
2024-09-11 12:46:38,617 - souk_mkid_readout.souk_mkid_readout:krm4:0 - INFO - Initializing block (writable): pfb
2024-09-11 12:46:38,619 - souk_mkid_readout.souk_mkid_readout:krm4:0 - INFO - Initializing block (writable): pfbtvg
2024-09-11 12:46:38,619 - souk_mkid_readout.souk_mkid_readout:krm4:0 - INFO - Initializing block (writable): autocorr
2024-09-11 12:46:38,620 - souk_mkid_readout.souk_mkid_readout:krm4:0 - INFO - Initializing block (writable): gen_cordic
2024-09-11 12:46:38,626 - souk_mkid_readout.souk_mkid_readout:krm4:0 - INFO - Initializing block (writable): gen_lut
2024-09-11 12:46:38,723 - souk_mkid_readout.souk_mkid_readout:krm4:0 - INFO - Initializing block (writable): psbscale
2024-09-11 12:46:38,724 - souk_mkid_readout.souk_mkid_readout:krm4:0 - INFO - Initializing block (writable): zoomfft
2024-09-11 12:46:38,726 - souk_mkid_readout.souk_mkid_readout:krm4:0 - INFO - Initializing block (writable): zoomacc
2024-09-11 12:46:38,727 - souk_mkid_readout.souk_mkid_readout:krm4:0 - INFO - Initializing block (writable): chanselect
2024-09-11 12:46:38,769 - souk_mkid_readout.souk_mkid_readout:krm4:0 - INFO - Initializing block (writable): mixer
2024-09-11 12:46:39,024 - souk_mkid_readout.souk_mkid_readout:krm4:0 - INFO - Initializing block (writable): psb_chanselect
2024-09-11 12:46:39,130 - souk_mkid_readout.souk_mkid_readout:krm4:0 - INFO - Initializing block (writable): psb
2024-09-11 12:46:39,136 - souk_mkid_readout.souk_mkid_readout:krm4:0 - INFO - Initializing block (writable): accumulator0
2024-09-11 12:46:39,153 - souk_mkid_readout.souk_mkid_readout:krm4:0 - INFO - Initializing block (writable): accumulator1
2024-09-11 12:46:39,166 - souk_mkid_readout.souk_mkid_readout:krm4:0 - INFO - Initializing block (writable): output
2024-09-11 12:46:39,168 - souk_mkid_readout.souk_mkid_readout:krm4:0 - INFO - Initializing block (writable): out_delay
2024-09-11 12:46:39,170 - souk_mkid_readout.souk_mkid_readout:krm4:0 - INFO - Detecting and compensating RX vs TX pipeline skew
2024-09-11 12:46:40,376 - souk_mkid_readout.blocks.block:krm4:p0_sync - WARNING - Timed out waiting for sync pulse
2024-09-11 12:46:40,639 - souk_mkid_readout.souk_mkid_readout:krm4:0 - INFO - Set sync delay to 9282 FPGA clocks
2024-09-11 12:46:40,639 - souk_mkid_readout.souk_mkid_readout:krm4:0 - INFO - Performing software global reset
2024-09-11 12:46:41,849 - souk_mkid_readout.blocks.block:krm4:p0_sync - WARNING - Timed out waiting for sync pulse

In [7]: r.sync.set_delay(6225) # guessing this hasnt changed

In [8]: r.output.use_psb()

In [9]: r.accumulators[0].set_acc_len(1000) # 500 samps per sec

In [10]: freqs, amps, phases = [1034e6], [1.0], [0.0] # == +10MHz at dac snapshot

In [11]: r.set_multi_tone(freqs,amplitudes=amps,phase_offsets_rads=phases)

In [12]: r.psbscale.set_scale(8)

In [13]: r.psbscale.get_overflow_count()
Out[13]: 0

In [14]: r.sync.arm_sync(wait=False);time.sleep(0.1);r.sync.sw_sync()

In [15]: ss=r.dac_snapshot.get_snapshot()[0]

In [16]: fig,(s1,s2)=subplots(2,1)

In [17]: s1.plot(ss.imag)
Out[17]: [<matplotlib.lines.Line2D at 0x7f8248f79db0>]

In [18]: s1.plot(ss.real)
Out[18]: [<matplotlib.lines.Line2D at 0x7f82509bc730>]

In [19]: s2.psd(ss,NFFT=len(ss),Fs=2048e6)
Out[19]: 
(array([1.14144623e-10, 9.69628992e-12, 8.27638326e-11, ...,
        2.50751065e-10, 1.62616998e-10, 1.19887731e-10]),
 array([-1.0240e+09, -1.0235e+09, -1.0230e+09, ...,  1.0225e+09,
         1.0230e+09,  1.0235e+09]))

In [20]: r.mixer.set_phase_switch_pattern([0,1],1,n_blank=0)

In [21]: fig,(s1,s2)=subplots(2,1)

In [22]: r.sync.arm_sync(wait=False);time.sleep(0.1);r.sync.sw_sync()

In [23]: ss=r.dac_snapshot.get_snapshot()[0]

In [24]: s1.plot(ss.imag)
Out[24]: [<matplotlib.lines.Line2D at 0x7f828cee06d0>]

In [25]: s1.plot(ss.real)
Out[25]: [<matplotlib.lines.Line2D at 0x7f8248473fd0>]

In [26]: s2.psd(ss,NFFT=len(ss),Fs=2048e6)
Out[26]: 
(array([6.53219352e-11, 2.27032184e-10, 2.98187920e-10, ...,
        5.69080257e-10, 1.28349169e-10, 1.06039247e-10]),
 array([-1.0240e+09, -1.0235e+09, -1.0230e+09, ...,  1.0225e+09,
         1.0230e+09,  1.0235e+09]))

In [27]: r.fpga.print_status()
antname: None
fw_build_time: 2024-09-10T14:39:20
fw_supported: True
fw_type: 2
fw_version: 7.4.0.0
host: sam1:krm4
programmed: True
sw_version: 0.1
timestamp: 2024-09-11T12:50:30.016202

[jack-h]

It should be instantaneous, but is applied to the LO before the PSB, so the PSB will have the effect of smoothing the switch (I think). Perhaps this isn't what is desired and the switch should be downstream of the PSB(?)

I have an electrician here right now and any time I try to do something he trips the RCD, but will get to looking at this soon.

[jack-h]

To elaborate a little, I think if you set the switch period much longer than 1 spectrum you should at least see consistent power out

[sr-cdf]

To elaborate a little, I think if you set the switch period much longer than 1 spectrum you should at least see consistent power out

Yes, I see that, until there is a switch.

Perhaps this isn't what is desired and the switch should be downstream of the PSB(?)

Maybe that is the way to go.

[sr-cdf]

How the tone looks:

No switching:

1 spectra per step:

64 spectra per step:

[jack-h]

Do you know what the target switching rate is likely to be?

I'll think a bit more about placing the switch after the PSB. It's easy in theory, but there needs to be a little thought into how to get the timing of the signals correct. I'll try and make firmware that lets you choose the switching mechanism at runtime, then it should be easy to play around with different configurations and see what works best

[sr-cdf]

I wish I could say I do but I don't really know what's going to happen when the phase modulated signal hits the resonators.

Best guess is anywhere from 100 Hz to 100 kHz, give or take a lot.

Sorry

On Tue, 17 Sept 2024, 11:22 Jack Hickish, @.***> wrote:

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Do you know what the target switching rate is likely to be?

I'll think a bit more about placing the switch after the PSB. It's easy in theory, but there needs to be a little thought into how to get the timing of the signals correct. I'll try and make firmware that lets you choose the switching mechanism at runtime, then it should be easy to play around with different configurations and see what works best

— Reply to this email directly, view it on GitHub https://github.com/realtimeradio/souk-firmware/issues/55#issuecomment-2355216855, or unsubscribe https://github.com/notifications/unsubscribe-auth/AEFQV46W5UEFFXDPVJNRKWLZW77G7AVCNFSM6AAAAABK6SGNISVHI2DSMVQWIX3LMV43OSLTON2WKQ3PNVWWK3TUHMZDGNJVGIYTMOBVGU . You are receiving this because you were mentioned.Message ID: @.***>