Open psychogenic opened 4 months ago
This looks great! Thank you and fingers crossed it fits in DIP40 sized PCB!
NOTE, I just realised one issue with my MUX approach combined with ZX Spectrum and frequency multiplier. The clock that is passed to Z80 on ZX Spectrum can be abruptly varying! In "normal" circumstances Z80 gets 3.5 MHz clock (derived from PAL frequency) HOWEVER in case of memory contention between the video (ULA) and CPU - ULA wins and temporarily pauses Z80 clock. I assume that would cause an issue with U8 multiplier, right?
For example see:
See pin 32 from ULA (IC1) feeding into pin 6 of Z80 (IC2).
So, I am thinking, maybe it is better to have 2 clock inputs in TT design - one clock to drive internal Z80 core and another (higher) to drive internal multiplexor? In case of ZX Spectrum higher clock could come directly from 14 MHz crystal oscillator instead of multiplier.
For project selection, you may want to go with something like the PY32F002A instead of the ATtiny?
Cheaper and the footprint is also smaller (QFN-16), if I'm not mistaken
Hm, I'm not actually seeing where the 3.5MHz clock actually comes from, but the interrupted clock--with no extra signaling just an abrupt hold--does look problematic... Will try and ponder. As for the PY32F002A: it's small, and damn cheap. The MCU selection was preliminary--just wanted something cheap that could use an internal clock and have enough flash on board to play, and I like the AVR 2 series stuff. I also really like datasheets I can actually read.
Hm, I'm not actually seeing where the 3.5MHz clock actually comes from
I added some annotation, ZX Spectrum's ULA creates an interrupted 3.5MHz signal to drive Z80 based on 14MHz crystal:
Hm, I'm not actually seeing where the 3.5MHz clock actually comes from
I added some annotation, ZX Spectrum's ULA creates an interrupted 3.5MHz signal to drive Z80 based on 14MHz crystal:
ULA creates Z80 clock by dividing its master 14MHz oscillator. But it holds Z80s clock high (measured at Z80 pin) during the video memory contention. Here is the link to book about ULA chip, which describes the circuit at gate level:
https://www.tomas-franke.cz/public/The-ZX-Spectrum-ULA.pdf
By the way, I wrote ULA core in Verilog, that is compliant with the book. We can put it on Tiny Tapeout one day. But I do not know, how to define the analog functions pins for Tiny Tapeout. For example the video output pins.
Hi,
Playing around with this a bit, am thinking of doing something like this:
The idea is to be as transparent and true as possible, so I'm taking the input clock and multiplying it by 4 to do the multiplexing.
Initial floorplanning says I might, just might, be able to fit this on a 40 pin DIP that would slot right into place (assuming I get to populate the ASIC top side and the rest underneath).
The MCU is there to setup the project through the TT MUX, and manage timing/latches and such, but would not interfere with anything.
It's still prelim and messy but this look like it would make sense to you?