rems-project / sail

Sail architecture definition language
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Error during Lem generates definitions for Isabelle #193

Open haitianzhishang opened 1 year ago

haitianzhishang commented 1 year ago

Source sail code: 截屏2023-01-06 14 51 42 Translated Lem code: 截屏2023-01-06 14 52 48 The error during generating Isabelle definition using 'make riscv_isa_build' : 截屏2023-01-06 14 54 36 The error description is rough and I don't know how to solve it. Hope for some directions.

bacam commented 1 year ago

Isabelle and Lem both require bitvectors to have statically known sizes - that is, they should either be a constant, or a parameter of the function (like 'n here). Unfortunately the size of shift_bits is only known at execution time.

We've encountered this before in the Arm models, and have a little support for rewriting this kind of thing into operations that don't need the execution-time sized bitvectors. For example, if we include mono_rewrites.sail from the libarary, use the -mono_rewrites option, and inline shift_bits,

let result : int = unsigned(slice(data, 0, lg2_sew));

then the resulting Lem uses unsigned_slice from the mono_rewrites library. I'm not sure what the best solution here is; some options are:

None of these is ideal, but I suspect the last one is probably the best option.

haitianzhishang commented 1 year ago

Thanks for your reply. If in this case that Isabelle and Lem both require bitvectors to have statically known sizes, it maybe inflexible for RISC-V vector extension and matrix extension.

bacam commented 1 year ago

It can be a problem, but we have successfully built several Arm models with vector instructions. This uses the monomorphisation support I mentioned above, which tries to introduce enough case splits that the resulting bitvectors have suitable sizes, along with some built-in rewrites to handle common patterns like unsigned(slice(...)).