Open torjeikenes opened 8 months ago
It's currently a bit too WIP to work with the RISC-V model as is. I have a fork (but I don't think I've published it) where I've removed all the usages of lists and it gets further, but actually getting something that's runnable with verilator would require more work I think.
Do you know if any more work has been done to support this or how much effort it would take to get this working?
I am attempting to compile the sail-riscv model to SystemVerilog by extending the makefile with this command:
sail -sv $(SAIL_SRCS) model/main.sail -sv_output_dir generated_definitions/sv
When doing this I get the following error:
Fatal error: exception Invalid_argument("List.init")
I am unsure if my usage of the command is correct, or if the issue is with sail-riscv or with sail, but since I only found "List.init" in this repo, I figured I would ask here. I would appreciate any insights into resolving this issue.