Error in "if gremlin=gremlin'HIGH then"

[hww]

Compiling by ISE finished with error: ERROR:HDLCompiler:1195 - "D:\projects\github\CoreAmstrad\BuildYourOwnZ80Computer\simple_DSK.vhd" Line 793: Prefix of attribute high is not a type mark

The line of code is: if gremlin=gremlin'HIGH then

Any ideas?

[renaudhelias]

CoreAmstrad can be compiled using "Quartus II 64-Bit Version 13.0.1" (for Altera FPGA), target final platform is MiST-board https://github.com/mist-devel/mist-binaries/tree/master/cores/amstrad (binaries)

Gremlin adds an original malicious effect in FDC : a certain timeout. But it is currently desactivated, see : constant IS_ARNOLDEMU_TESTBENCH:boolean:=false; -- does activate a gremlin...

'HIGH is vhdl about "max value of a certain variable", so that code is equivalent to : if gremlin=511 then

MiST-board has a lot of core source code (arcade is certainly the smallest one) :

• https://github.com/mist-devel/mist-board/tree/master/cores and greats tutorials to learn MiST-board step by step :
• https://github.com/mist-devel/mist-board/tree/master/tutorials/soc You compile and put resulting core.rbf file on SDCARD, and then insert it on MiST-board :)

[hww]

Thank you. I do not have this board anyway, and do not planing to buy. If that it is more easy to compile with Quartus 13.0.1 Let me try.

[renaudhelias]

First prototype of this project was running on a Diligent starter-kit using ISE Xilinx, and then I ported it three years ago into MiST-board (an Altera FPGA final plateform), because this last one, even my father can use it.

[hww]

Thank you for advice. I want modify CPC core to Aleste 520ex mode. Also have idea to implement other computer core. Hope I can do some of this. :) installing quartus now

[renaudhelias]

Renaming your personalized Caprice32-Aleste ROM like this : AL512.eZZ bdos.e03 amsdos.e07 core.rbf (CoreAmstrad binary renamed)

Got : with a loop reset (4 seconds)

[hww]

Intro

AL512 is full 64KB of the Aleste ROM. It includes amsdos and bdos.
The amsdos is standard CPC ROM. The version of this ROM in Aleste has only different text message.

About reboots

Aleste has more that just additional ROM page. There are modifications in hardware.

Ext Port (Port FABFh) The register which switch the CPC or MSX modes. And additional features.

1) MSX mode has different memory manager similar to MSX mapper 2) There is hi resolution mode, with twice bigger frame buffer. 3) Better color lockup table 4) Addition battery clock IC. (can be partially implemented) 5) Interval timer with the serial interface for mouse (can be omitted)

Next step

If to make Aleste mode runs, then there can be implemented next step. To add MagicSound support. The MS board is 4 channel sampler synthesis. It allow to play .stm files.

More Info Aleste520 @ CPC WIKI

[renaudhelias]

==Howto hack CoreAmstrad==

Firstly, if at top of a CoreAmstrad file, you don't see that smiling head in comments, it's certainly (about 99% luck) a death file not used finally in project :

--    {@{@{@{@{@{@
--  {@{@{@{@{@{@{@{@  This code is covered by CoreAmstrad
--  {@    {@{@    {@
--  {@{@{@{@{@{@{@{@
--  {@  {@{@{@{@  {@
--  {@{@        {@{@
--  {@{@{@{@{@{@{@{@
--    {@{@{@{@{@{@

Secondly : TOTO versus TOTO_mem variables Variable ending with "_mem" can be read and write as a normal computer langage variable : DI_mem DI without "_mem" extension is a signal (a wire), it is generally connected to a variable. Generally you capture a signal (a wire value) : DI_mem:=DI; and then you play with it if DI_mem=x"FF" then DO_mem:=x"07";end if; and then fire the result into wire : DO<=DO_mem;

Then

1. MSX mode has different memory manager similar to MSX mapper AmstradRAMROM.vhd (RAM map) simple_GateArray.vhd (RAM controler, perhaps Aleste ExtPort ?)
2. There is hi resolution mode, with twice bigger frame buffer. (next step ? as it's a renderer... (no read, just write))
3. Better color lockup table (next step ? as it's a renderer... (no read, just write))
4. Addition battery clock IC. (can be partially implemented) pio.vhd (PPI 8255)
5. Interval timer with the serial interface for mouse (can be omitted)

...lucky, all of them are wired each other inside FPGAmstrad_amstrad_motherboard.vhd, so your hacking area would be just around code, not visual schematic. FPGAmstrad_amstrad_motherboard is a component in main visual schematic FPGAmstrad_MiST_top (I always use a visual schematic at top)

Finally VHDL is really hard langage, sometime you do all right, and nothing run. It's because it's a electronical langage and depends on... target platform size : compiling VHDL is an heuristic, that put components generated here and then here. So do backups when something seems running fine !

I can review and test your fork when you want :)

[hww]

Thank you... I will try... and report you in case of any progress

[renaudhelias]

I'm currently working on original FPGAmstrad fork (gracefully due to Jepalza) : https://github.com/renaudhelias/FPGAmstrad implemented in a cheaper end-user FPGA : ZX-Uno from Spain.

This version is more on an educative way (not a lot of options, just one minimal way, but with max of quality), it can be largely easier to fork, as it contains original simple FPGAmstrad drawn schematics.

I don't think you can reach the full options of Aleste on it (actually it does use 97% of space), but, normaly you can boot the Russian Amstrad (using a russian keyboard ?) part on it.

Can be largely easier to fork from this one.

Normaly after one month, I could reach a first usefull version (actually only put disk is inserted on system), it's a Xilinx version, in fact it is the original one over documented here : www.cpcwiki.eu/index.php/FPGAmstrad