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replimoc / compiler

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Spillcode generation does not work correctly for StorageRegisterOperations #215

Closed andreas-eberle closed 9 years ago

andreas-eberle commented 9 years ago

Can be reproduced by reducing the number of available register for the register allocation to 1. Then the test file Sorter.mj produces lines like

´´´ imul $0x4, -0x30(%rbp) # mul operation ´´´

vzickner commented 9 years ago

For this task, I need one more spill code register. Reason is that:

mov R1, (R2, R3, x) needs three registers.

Maybe we can optimize this later to:

mov MEM3, R2
mul x, R2
add M2, R2
mov R1, (R2)
andreas-eberle commented 9 years ago

Fixed already.