Closed Amstrad-nutter closed 2 years ago
This is covered in the documentation on the Wiki
The board is designed specifically for 28256 32K EEPROMs and 27128 16K EPROMs. 27256 32K EPROMS can be used but are limited to holding a single 16K image (stored twice but with only one of the DIP selected to prevent logging twice).
The 27256 and 28256 parts have the A14 and WE* (Vpp) pins swapped over, but of course it is easily possible to make the same change in the Eagle layout if you need to use 27256 parts instead. Alternatively adding a link will make the board compatible with both, but at the slight risk of accidentally overwriting EEPROM data if the user sets the link is incorrectly - something I chose to avoid with this release.
The minor V1.10 revision of the board adds this feature now. The EPROM A14/EEPROM WE pin for each ROM is pulled up to VDD by default, but by adding a jumper header on a two pin link the EPROM A14 pin will be driven by the CPLD. There are no changes to the CPLD firmware for the new board.
Six rom expansion, The eagle layout v1.0 has no A14 line to roms and by virtue cannot access 32k roms just 16k which then log twice.