rhodeser / tunnel-vision

FPGA implementation of a tunnel racing game
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Investigate and implement LFSR and/or other random generators #7

Closed rhodeser closed 10 years ago

rhodeser commented 10 years ago

The location of the walls will be generated randomly to avoid the hassle of programming courses and provide better game play. The 8-bit LFSR will feed bits for the Picoblaze to look at to decide the wall's orientation. The Picoblaze will use 2 bits to decide the wall orientation. Certain randomly generated scenarios are undesirable, including:

Weighting this randomization can improve playability. Since the LFSR numbers are deterministic, a user will play the same course every time they reset the board. To prevent this, other inputs (switches and pushbuttons) can be x-orred with the initial random number.

d-rohan commented 10 years ago

I am trying to implement two versions of the LFSR - 2 bit and 3 bit. We will get limited patterns with these so if we take the output of anyone of the registers in the LFSR and ex or it with the switch or push button we will get good amount of randomization. Here is the picture of what I am saying imag0944.

3 bit LFSR will generate more patterns and at the output we will get only 2 bits. This can be done in verilog too.

rhodeser commented 10 years ago

Is there any reason not to use a bigger LFSR, like 8 bits? If we're deciding in the picoblaze how often to update the wall orientation, we could just store those values internally and just get new 8 bit values when we need to later (at a predefined interval). That also would mean we'd have pretty random even if we don't implement the xor of the pushbutton inputs.

-Erik

On Wed, Mar 12, 2014 at 12:23 AM, d-rohan notifications@github.com wrote:

I am trying to implement two versions of the LFSR - 2 bit and 3 bit. We will get limited patterns with these so if we take the output of anyone of the registers in the LFSR and ex or it with the switch or push button we will get good amount of randomization. Here is the picture of what I am saying [image: imag0944]https://f.cloud.github.com/assets/6875458/2394570/9a07668a-a9b6-11e3-8130-58de7075422f.jpg .

3 bit LFSR will generate more patterns and at the output we will get only 2 bits. This can be done in verilog too.

Reply to this email directly or view it on GitHubhttps://github.com/rhodeser/tunnel-vision/issues/7#issuecomment-37381591 .

d-rohan commented 10 years ago

Yes we can do that too. I will try to implement it in assembly language.

rhodeser commented 10 years ago

Would that be easier than implementing it in Verilog and just feeding it directly to the Pico core?

d-rohan commented 10 years ago

So the 2 bits which the Picoblaze will look at are inputs to the LFSR or outputs from LFSR ? For example - 8 bit LFSR will generate 8 bit patterns. I believe it will be a bit easier to do this in Verilog.

rhodeser commented 10 years ago

I think it should look at the output from the LFSR. I agree on using Verilog. There's some good information here.

d-rohan commented 10 years ago

I implemented the LFSR. It works fine. I have some questions about integrating it with our rest of the module.