Open Leon924 opened 2 years ago
Hi sir,
Am running coremark benchmark in baremetal in riscv32. Am facing three issues when am loading the binary.
Issue 1;list and matrix initialization are not correct. Issue 2: am getting incorrect crc list, crc matrix and state values because of wrong initialization of list and matrix.
Issue 3: sometimes am getting mcause 5 trap in lh and lw instructions in different places.
Can you please help me to resolve the above issues?. Can you please share me riscv32 baremetal source code in coremark?
Hi:
under chipyard/sims/vcs folder, I compile the MediumBoomConfig boom instance, then try to run 100 iterations coremark. As the log below show, the CPU time spend 18 hours, however, the simulation time only pass about 26ms. To obtain a valid result, 10s simulation time is needed. That means I need to run 40000iterations coremark binary. Do I conclude that right ? If so, that's so long to wait, lol.
kindly ask for help here. could you please help me to check this? and give me some suggestion for a valid result? @jerryz123
Edit: Is it related to the variable CLOCK_PERIOD in vcs.mk?