riscv-collab / v8

Port of Google v8 engine to RISC-V.
https://github.com/v8-riscv/v8/wiki
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Check whether we need cvt_d_l_Trunc_l_d and Cvt_s_ul_Trunc_ul_s in cctest/test-macro-assembler-riscv32 #631

Closed qjivy closed 2 years ago

qjivy commented 2 years ago

Error log:

out/riscv32.debug$ ./cctest test-macro-assembler-riscv32/cvt_d_l_Trunc_l_d
Sim: Unsupported inst. Func:DecodeRVRFPType Line:4144 PC:0x34a04040 d2250553       fcvt.d.l  fa0, a0            
Trace/breakpoint trap

out/riscv32.debug$ ./cctest test-macro-assembler-riscv32/Cvt_s_ul_Trunc_ul_s
Sim: Unsupported inst. Func:DecodeRVRFPType Line:3911 PC:0x1cb84040 d0350553       fcvt.s.lu fa0, a0            
Trace/breakpoint trap
qjivy commented 2 years ago

RV32 should not have these 2 test case. Remove them by #628