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riscv-non-isa / iopmp-spec

This repository contains the specification source for the RISC-V IOPMP Specification. This document proposes a Physical Memory Protection Unit of Input/Output devices, IOPMP for short, to regulate the accesses issued from the bus masters.
https://jira.riscv.org/browse/RVG-56
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Triggering an interrupt may not record the error information #24

Open leBsky opened 1 week ago

leBsky commented 1 week ago

The spec claims that "The error capture record maintains the specifics of the first illegal access detected, except if the following two conditions are held: (1) any interrupt-suppress bit regarding the access is set, and (2) no bus error is returned" I understand that it means error record requires no interrupt suppression and no bus error suppression.

In this case, when an interrupt is not suppressed but bus error is suppressed, the interrupt will be triggered and it should update ERR_REQINFO.v to 1 to denote the interrupt pending status. However, from the perspective of error recording mechanism, since the bus error suppression is detected, then it will not update the ERR_REQINFO.v. Please help clarify the inconsistent condition.

tyshyu commented 1 week ago

In this case, the error record (ERR_REQINFO.v also is a part of error record) will be updated because condition (1) is not held.

Error record will not be updated when conditions both are held (interrupt is suppressed and bus error is suppressed).