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riscv-non-isa / iopmp-spec

This repository contains the specification source for the RISC-V IOPMP Specification. This document proposes a Physical Memory Protection Unit of Input/Output devices, IOPMP for short, to regulate the accesses issued from the bus masters.
https://jira.riscv.org/browse/RVG-56
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what happens if hit multiple non-priority entries or hit no entries(including priority and non-priority) ? #8

Closed leBsky closed 1 month ago

leBsky commented 1 month ago
  1. What will happen when hit multiple non-priority entries ?

For example, hit non-priority entry1 and gets all the permission needed. Also, hit non-priority entry2 and the rwx permission is 3'b000. In this case, is it legal or not? Should interrupt or error response be generated based on entry2's setting? Please help clarify this in spec.

  1. what will happen when no entries(including priority and non-priority) are hit ?
tyshyu commented 1 month ago

  1. The case is legal. Entry2 is not considered a hit. An entry is hit when the entry matches all bytes of a transaction and the entry grants the transaction permission. Of course, the entry must have the highest priority. The rules about multiple non-priority entries have been clarified in the latest commit 1461046.

  2. The transaction is illegal. If RRID of the transaction is legal, the error code of the transaction is "Not hit any rule".