riscv-non-isa / riscv-ap-tee

This repo holds the work area and revisions of the non-ISA specification created by the RISC-V AP-TEE TG. This specification defines the programming interfaces (ABI) to support the Confidential VM Extension (CoVE) confidential computing architecture for RISC-V application-processor platforms.
https://jira.riscv.org/browse/RVG-76
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Chapter 5.4 - Interruptible and re-entrant TSM #102

Open eckhard-delfs-qualcomm opened 1 week ago

eckhard-delfs-qualcomm commented 1 week ago

Text states "The OS/VMM can handle the interrupt and may resume that TSM thread or .." Regarding the "may resume". Does this mean via TEERESUME?