riscv-non-isa / riscv-ap-tee

This repo holds the work area and revisions of the non-ISA specification created by the RISC-V AP-TEE TG. This specification defines the programming interfaces (ABI) to support the Confidential VM Extension (CoVE) confidential computing architecture for RISC-V application-processor platforms.
https://jira.riscv.org/browse/RVG-76
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[Qualcomm feedback]: Chapter 8.1.1: TVM execution paragraph #62

Closed rsahita closed 6 months ago

rsahita commented 7 months ago

Reference: link

Following the assignment of memory and VCPU resources, the host can transition the guest into a TVM_RUNNABLE state by calling sbi_covh_finalize_tvm(). The host must set up TVM Boot vCPU execution parameters like the entrypoint (ENTRY_PC) and boot argument (ENTRY_ARG) using arguments to sbi_covh_finalize_tvm(). Note that some TEE calls are no longer permissible after this transition.

host calls? The TEE cannot even run before the TVM has been finalized

rsahita commented 6 months ago

correct - should be COVH- will fix. cc @ozkoyuncu

rsahita commented 6 months ago

addressed by PR #67