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riscv-non-isa / riscv-ap-tee

This repo holds the work area and revisions of the non-ISA specification created by the RISC-V AP-TEE TG. This specification defines the programming interfaces (ABI) to support the Confidential VM Extension (CoVE) confidential computing architecture for RISC-V application-processor platforms.
https://jira.riscv.org/browse/RVG-76
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TSM capabilities and minor editorial changes #82

Closed wojciechozga closed 1 month ago

wojciechozga commented 2 months ago

We propose to extend the COVH get_tsm_info() call with additional information called TSM capabilities to simplify implementation of a hypervisor that supports different CoVE deployment models. Specifically, TSM informs the hypervisor via the tsm_info structure what capabilities is supports, such as support for single- or mult-step TVM creation, local and/or remote attestation, legacy interrupt handling or AIA, static or dynamic memory allocation.

Additionally, we provide a set of minor editorial changes that clarify: (1) how interrupts are injected if AIA is not supported, (2) what properties local attestation can offer for embedded platforms, (3) how TVM enables or disables injection of all interrupts (wildcard), (4) how MMIO regions are specified, (5) how TVM retrieves local attestation secret.

atishp04 commented 1 month ago

Apart from those nit comments, looks good to me.

wojciechozga commented 1 month ago

Thanks Atish and Ravi for feedback and valuable comments. I have addressed them and pushed already changes.