riscv-non-isa / riscv-arch-test

https://jira.riscv.org/browse/RVG-141?src=confmacro
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Added missing .*32 in rv32i_m/C/src/clh-01.S #455

Closed davidharrishmc closed 5 months ago

davidharrishmc commented 5 months ago
## Description Added missing .*32 in rv32i_m/C/src/clh-01.S Tested on https://github.com/openhwgroup/cvw ### Related Issues N/A ### Ratified/Unratified Extensions - [ ] Ratified - [x ] Unratified ### List Extensions Zcb ### Reference Model Used - [ x] SAIL - [ x] Spike - [ ] Other - < SPECIFY HERE > ### Mandatory Checklist: - [ x] All tests are compliant with the test-format spec present in this repo ? - [ x] Ran the new tests on RISCOF with SAIL/Spike as reference model successfully ? - [ ] Ran the new tests on RISCOF in [coverage mode](https://riscof.readthedocs.io/en/stable/commands.html#coverage) - [ ] Link to Google-Drive folder containing the new coverage reports ([See this](https://github.com/riscv-non-isa/riscv-arch-test/blob/main/CONTRIBUTION.md#uploading-test-stats) for more info): < SPECIFY HERE > - [ ] Link to PR in RISCV-ISAC from which the reports were generated : < SPECIFY HERE > - [x ] Changelog entry created with a minor patch ### Optional Checklist: - [ ] RISCV-V CTG PR link if tests were generated using it : < SPECIFY HERE > - [ x] Were the tests hand-written/modified ? - [ x] Have you run these on any hard DUT model ? Please specify name and provide link if possible in the description - - [ ] If you have modified arch\_test.h Please provide a detailed description of the changes in the Description section above.