riscv-non-isa / riscv-asm-manual

RISC-V Assembly Programmer's Manual
https://jira.riscv.org/browse/RVG-4
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Add pseudoinstruction: sext.b, sext.h, zext.b, zext.h and zext.w #61

Closed kito-cheng closed 3 years ago

kito-cheng commented 3 years ago

Add sext.b, sext.h, zext.b, zext.h and zext.w, and mention sext.b and sext.h could be non pseudo instruction, the motivation is we already has sext.w now, and B ext also want to define more pseudo for sext or zext, so why not add to the baseline pseudo instruction, and let assembler pick best way to expand.

kito-cheng commented 3 years ago

@clairexen @aswaterman

aswaterman commented 3 years ago

Seems reasonable to me, to simplify some assembly programming. However, compilers should avoid avoid sext.[b|h] and zext.[h|w] when Zbb isn't present (though actually Zba can implement zext.w, too), since it can be more efficient to schedule the two shifts apart from each other.

kito-cheng commented 3 years ago

However, compilers should avoid avoid sext.[b|h] and zext.[h|w] when Zbb isn't present (though actually Zba can implement zext.w, too), since it can be more efficient to schedule the two shifts apart from each other.

Agree with that, generally compiler should avoid emit pseudo instruction, which will expand to more than one instructions...unless necessary like call or tail.

jim-wilson commented 3 years ago

Zba has zext.h also, so all of them are a single instruction with the B extension.

This creates work for binutils and llvm developers, and maybe FreeBSD also. We can handle the binutils work. Who does the llvm work? It would be nice to get an OK from the LLVM folks at least before committing this.

kito-cheng commented 3 years ago

@lenary @ebahapo

We can handle the binutils work. Who does the llvm work?

We have few LLVM developer now, and it should not too much effort I guess, maybe @topperc could help on that?

kito-cheng commented 3 years ago

Note: I didn't mention how pseudo expand with B-extension on purpose, since it still might change.

topperc commented 3 years ago

I agree it shouldn't be much effort in LLVM. I can help.

kito-cheng commented 3 years ago

@topperc thanks you take this :)

I guess just wait some another LLVM folks (maybe non-SiFive guys?) to ack this.

lenary commented 3 years ago

I don't have a fundamental problem with this, and would be happy to help review a patch :)

lenary commented 3 years ago

I do wonder if we want to say "at most two 32-bit instructions" or the like, in these docs? It's unclear to me what guarantees people coding with pseudo-instructions want - turning off relaxation and compressed instructions is needed even if you stick to non-pseduo-instructions and want predictable instruction sizes - presumably if you require predictable instruction sizes, it's also best to stay away from pseudo-instructions too.

nick-knight commented 3 years ago

From my perspective as an assembly programmer who uses pseudoinstructions, all I really want are clear descriptions of

In terms of "guarantees", what I'm looking for is a guarantee that "(only) the following things may happen" to my assembly program. What isn't clear to me is whether these things should be considered implementation details --- thus belonging in assembler/linker documentation --- or part of the assembly language specification --- thus belonging here.

I completely understand that we are woefully understaffed w.r.t. documentation, I'm not asking anyone to do anything.

lenary commented 3 years ago

@kito-cheng fyi, I revise my offer to "review" a patch that implements this, I've got an LLVM patch mostly ready which I'll upload to phabricator and tag you as a reviewer for.

kito-cheng commented 3 years ago

Changes:

kito-cheng commented 3 years ago

@lenary I saw the patch, thanks!

kito-cheng commented 3 years ago

@lenary Changes applied, thanks!

lenary commented 3 years ago

I just landed the LLVM implementation in https://github.com/llvm/llvm-project/commit/12406ade0625