riscv-non-isa / riscv-asm-manual

RISC-V Assembly Programmer's Manual
https://jira.riscv.org/browse/RVG-4
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Update assembler relocation function related descriptions #77

Open hirooih opened 2 years ago

hirooih commented 2 years ago

In the table of A listing of standard RISC-V pseudoinstructions, for example, the base Instruction for la rd, symbol is described as:

auipc rd, symbol[31:12]; addi rd, rd, symbol[11:0]

In The RISC-V Instruction Set Manual Volume I: Unprivileged ISA, v20191213, Chapter 25 RISC-V Assembly Programmer’s Handbook (in the latest version the chapter is deleted), it is described as;

auipc rd, delta[31 : 12] + delta[11]
addi rd, rd, delta[11:0]
where delta = symbol − pc

The current description in this manual is wrong. It does not consider the signed immediate offset.

This PR proposes:

Note that I could not find clear description of %tprel_* and %tls_*. So they maybe still wrong. Please review them carefully.

johnwinans commented 2 years ago

I would prefer to see the LA and LI operations described along the lines of:

li rd,constant

        lui  rd,(constant+0x00000800) >> 12
        addi rd,rd,(constant & 0x00000fff)

Note that the LUI will sign-extend the 20-bit value on RV64 & RV128 systems.

hirooih commented 2 years ago

@johnwinans

Thank you for your suggestion. I borrowed the expression of the RISC-V specification, but the proposed expression is easier to understand. RISC-V ABIs Specification uses the similar expression.

And I also found I misunderstood the definition of %pcrel_lo(label). I fixed it, too.

hirooih commented 2 years ago

And I also found I misunderstood the definition of %pcrel_lo(label). I fixed it, too.

I did not fix the psedoinstructions table.