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riscv-non-isa / riscv-brs

The Boot and Runtime Services (BRS) specification provides the software requirements for system vendors and Operating System Vendors (OSVs) to interoperate with one another by providing expectations for the Operating System (OS) to utilize in acts of device discovery, system management, and other rich operations provided in this specification.
https://jira.riscv.org/browse/RVG-48
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Heterogeneous performance harts #110

Closed xypron closed 8 months ago

xypron commented 9 months ago

"8.1.1. BRS-I Recipe Guidance" takes a very negative stance on "heterogeneous performance harts".

Maybe the author thought of harts implementing different sets of instructions. As long as all harts implement the same set of instructions heterogeneous harts should not be that much of an issue. Efficient scheduling is the major task here.

xypron commented 9 months ago

https://uefi.org/specs/ACPI/6.5/08_Processor_Configuration_and_Control.html#collaborative-processor-performance-control specifies how harts differing in performance can be described.

xypron commented 9 months ago

The RISC-V Server Platform specification already has a requirement

RVA_030: The ISA extensions and associated CSR field widths implemented by any of the RISC-V application processor harts in the SoC MUST be identical.

Referring to such a requirement would be more helpful than the current text.